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remove unnecessary Lhs (_lhs) affix from shift and rotate instrs
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@Robbepop
Robbepop committed Oct 4, 2024
1 parent d4ded74 commit b3f481a
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Showing 15 changed files with 73 additions and 73 deletions.
40 changes: 20 additions & 20 deletions crates/ir/src/for_each_op.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4027,8 +4027,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i32>,
},
/// A Wasm `i32.shl` equivalent Wasmi instruction with 16-bit immediate `lhs` operand.
#[snake_name(i32_shl_imm16_lhs)]
I32ShlImm16Lhs {
#[snake_name(i32_shl_imm16)]
I32ShlImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i32>,
Expand All @@ -4055,8 +4055,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i32>,
},
/// A Wasm `i32.shr_u` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i32_shr_u_imm16_lhs)]
I32ShrUImm16Lhs {
#[snake_name(i32_shr_u_imm16)]
I32ShrUImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i32>,
Expand All @@ -4083,8 +4083,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i32>,
},
/// A Wasm `i32.shr_s` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i32_shr_s_imm16_lhs)]
I32ShrSImm16Lhs {
#[snake_name(i32_shr_s_imm16)]
I32ShrSImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i32>,
Expand All @@ -4111,8 +4111,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i32>,
},
/// A Wasm `i32.rotl` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i32_rotl_imm16_lhs)]
I32RotlImm16Lhs {
#[snake_name(i32_rotl_imm16)]
I32RotlImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i32>,
Expand All @@ -4139,8 +4139,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i32>,
},
/// A Wasm `i32.rotr` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i32_rotr_imm16_lhs)]
I32RotrImm16Lhs {
#[snake_name(i32_rotr_imm16)]
I32RotrImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i32>,
Expand Down Expand Up @@ -4487,8 +4487,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i64>,
},
/// A Wasm `i64.shl` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i64_shl_imm16_lhs)]
I64ShlImm16Lhs {
#[snake_name(i64_shl_imm16)]
I64ShlImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i64>,
Expand All @@ -4515,8 +4515,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i64>,
},
/// A Wasm `i64.shr_u` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i64_shr_u_imm16_lhs)]
I64ShrUImm16Lhs {
#[snake_name(i64_shr_u_imm16)]
I64ShrUImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i64>,
Expand All @@ -4543,8 +4543,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i64>,
},
/// A Wasm `i64.shr_s` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i64_shr_s_imm16_lhs)]
I64ShrSImm16Lhs {
#[snake_name(i64_shr_s_imm16)]
I64ShrSImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i64>,
Expand All @@ -4571,8 +4571,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i64>,
},
/// A Wasm `i64.rotl` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i64_rotl_imm16_lhs)]
I64RotlImm16Lhs {
#[snake_name(i64_rotl_imm16)]
I64RotlImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i64>,
Expand All @@ -4599,8 +4599,8 @@ macro_rules! for_each_op {
rhs: ShiftAmount<i64>,
},
/// A Wasm `i64.rotr` equivalent Wasmi instruction with 16-bit immediate `lhs` value.
#[snake_name(i64_rotr_imm16_lhs)]
I64RotrImm16Lhs {
#[snake_name(i64_rotr_imm16)]
I64RotrImm16 {
@result: Reg,
/// The 16-bit immediate value.
lhs: Const16<i64>,
Expand Down
40 changes: 20 additions & 20 deletions crates/wasmi/src/engine/executor/instrs.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -969,32 +969,32 @@ impl<'engine> Executor<'engine> {
}
Instr::I32Shl { result, lhs, rhs } => self.execute_i32_shl(result, lhs, rhs),
Instr::I32ShlBy { result, lhs, rhs } => self.execute_i32_shl_by(result, lhs, rhs),
Instr::I32ShlImm16Lhs { result, lhs, rhs } => {
self.execute_i32_shl_imm16_lhs(result, lhs, rhs)
Instr::I32ShlImm16 { result, lhs, rhs } => {
self.execute_i32_shl_imm16(result, lhs, rhs)
}
Instr::I32ShrU { result, lhs, rhs } => self.execute_i32_shr_u(result, lhs, rhs),
Instr::I32ShrUBy { result, lhs, rhs } => {
self.execute_i32_shr_u_by(result, lhs, rhs)
}
Instr::I32ShrUImm16Lhs { result, lhs, rhs } => {
self.execute_i32_shr_u_imm16_lhs(result, lhs, rhs)
Instr::I32ShrUImm16 { result, lhs, rhs } => {
self.execute_i32_shr_u_imm16(result, lhs, rhs)
}
Instr::I32ShrS { result, lhs, rhs } => self.execute_i32_shr_s(result, lhs, rhs),
Instr::I32ShrSBy { result, lhs, rhs } => {
self.execute_i32_shr_s_by(result, lhs, rhs)
}
Instr::I32ShrSImm16Lhs { result, lhs, rhs } => {
self.execute_i32_shr_s_imm16_lhs(result, lhs, rhs)
Instr::I32ShrSImm16 { result, lhs, rhs } => {
self.execute_i32_shr_s_imm16(result, lhs, rhs)
}
Instr::I32Rotl { result, lhs, rhs } => self.execute_i32_rotl(result, lhs, rhs),
Instr::I32RotlBy { result, lhs, rhs } => self.execute_i32_rotl_by(result, lhs, rhs),
Instr::I32RotlImm16Lhs { result, lhs, rhs } => {
self.execute_i32_rotl_imm16_lhs(result, lhs, rhs)
Instr::I32RotlImm16 { result, lhs, rhs } => {
self.execute_i32_rotl_imm16(result, lhs, rhs)
}
Instr::I32Rotr { result, lhs, rhs } => self.execute_i32_rotr(result, lhs, rhs),
Instr::I32RotrBy { result, lhs, rhs } => self.execute_i32_rotr_by(result, lhs, rhs),
Instr::I32RotrImm16Lhs { result, lhs, rhs } => {
self.execute_i32_rotr_imm16_lhs(result, lhs, rhs)
Instr::I32RotrImm16 { result, lhs, rhs } => {
self.execute_i32_rotr_imm16(result, lhs, rhs)
}
Instr::I64Clz { result, input } => self.execute_i64_clz(result, input),
Instr::I64Ctz { result, input } => self.execute_i64_ctz(result, input),
Expand Down Expand Up @@ -1053,32 +1053,32 @@ impl<'engine> Executor<'engine> {
}
Instr::I64Shl { result, lhs, rhs } => self.execute_i64_shl(result, lhs, rhs),
Instr::I64ShlBy { result, lhs, rhs } => self.execute_i64_shl_by(result, lhs, rhs),
Instr::I64ShlImm16Lhs { result, lhs, rhs } => {
self.execute_i64_shl_imm16_lhs(result, lhs, rhs)
Instr::I64ShlImm16 { result, lhs, rhs } => {
self.execute_i64_shl_imm16(result, lhs, rhs)
}
Instr::I64ShrU { result, lhs, rhs } => self.execute_i64_shr_u(result, lhs, rhs),
Instr::I64ShrUBy { result, lhs, rhs } => {
self.execute_i64_shr_u_by(result, lhs, rhs)
}
Instr::I64ShrUImm16Lhs { result, lhs, rhs } => {
self.execute_i64_shr_u_imm16_lhs(result, lhs, rhs)
Instr::I64ShrUImm16 { result, lhs, rhs } => {
self.execute_i64_shr_u_imm16(result, lhs, rhs)
}
Instr::I64ShrS { result, lhs, rhs } => self.execute_i64_shr_s(result, lhs, rhs),
Instr::I64ShrSBy { result, lhs, rhs } => {
self.execute_i64_shr_s_by(result, lhs, rhs)
}
Instr::I64ShrSImm16Lhs { result, lhs, rhs } => {
self.execute_i64_shr_s_imm16_lhs(result, lhs, rhs)
Instr::I64ShrSImm16 { result, lhs, rhs } => {
self.execute_i64_shr_s_imm16(result, lhs, rhs)
}
Instr::I64Rotl { result, lhs, rhs } => self.execute_i64_rotl(result, lhs, rhs),
Instr::I64RotlBy { result, lhs, rhs } => self.execute_i64_rotl_by(result, lhs, rhs),
Instr::I64RotlImm16Lhs { result, lhs, rhs } => {
self.execute_i64_rotl_imm16_lhs(result, lhs, rhs)
Instr::I64RotlImm16 { result, lhs, rhs } => {
self.execute_i64_rotl_imm16(result, lhs, rhs)
}
Instr::I64Rotr { result, lhs, rhs } => self.execute_i64_rotr(result, lhs, rhs),
Instr::I64RotrBy { result, lhs, rhs } => self.execute_i64_rotr_by(result, lhs, rhs),
Instr::I64RotrImm16Lhs { result, lhs, rhs } => {
self.execute_i64_rotr_imm16_lhs(result, lhs, rhs)
Instr::I64RotrImm16 { result, lhs, rhs } => {
self.execute_i64_rotr_imm16(result, lhs, rhs)
}
Instr::I32WrapI64 { result, input } => self.execute_i32_wrap_i64(result, input),
Instr::I32Extend8S { result, input } => self.execute_i32_extend8_s(result, input),
Expand Down
22 changes: 11 additions & 11 deletions crates/wasmi/src/engine/executor/instrs/binary.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -140,17 +140,17 @@ impl Executor<'_> {
(i32, Instruction::I32SubImm16Rev, execute_i32_sub_imm16_lhs, UntypedVal::i32_sub),
(i64, Instruction::I64SubImm16Rev, execute_i64_sub_imm16_lhs, UntypedVal::i64_sub),

(i32, Instruction::I32ShlImm16Rev, execute_i32_shl_imm16_lhs, UntypedVal::i32_shl),
(i32, Instruction::I32ShrUImm16Rev, execute_i32_shr_u_imm16_lhs, UntypedVal::i32_shr_u),
(i32, Instruction::I32ShrSImm16Rev, execute_i32_shr_s_imm16_lhs, UntypedVal::i32_shr_s),
(i32, Instruction::I32RotlImm16Rev, execute_i32_rotl_imm16_lhs, UntypedVal::i32_rotl),
(i32, Instruction::I32RotrImm16Rev, execute_i32_rotr_imm16_lhs, UntypedVal::i32_rotr),

(i64, Instruction::I64ShlImm16Rev, execute_i64_shl_imm16_lhs, UntypedVal::i64_shl),
(i64, Instruction::I64ShrUImm16Rev, execute_i64_shr_u_imm16_lhs, UntypedVal::i64_shr_u),
(i64, Instruction::I64ShrSImm16Rev, execute_i64_shr_s_imm16_lhs, UntypedVal::i64_shr_s),
(i64, Instruction::I64RotlImm16Rev, execute_i64_rotl_imm16_lhs, UntypedVal::i64_rotl),
(i64, Instruction::I64RotrImm16Rev, execute_i64_rotr_imm16_lhs, UntypedVal::i64_rotr),
(i32, Instruction::I32ShlImm16Rev, execute_i32_shl_imm16, UntypedVal::i32_shl),
(i32, Instruction::I32ShrUImm16Rev, execute_i32_shr_u_imm16, UntypedVal::i32_shr_u),
(i32, Instruction::I32ShrSImm16Rev, execute_i32_shr_s_imm16, UntypedVal::i32_shr_s),
(i32, Instruction::I32RotlImm16Rev, execute_i32_rotl_imm16, UntypedVal::i32_rotl),
(i32, Instruction::I32RotrImm16Rev, execute_i32_rotr_imm16, UntypedVal::i32_rotr),

(i64, Instruction::I64ShlImm16Rev, execute_i64_shl_imm16, UntypedVal::i64_shl),
(i64, Instruction::I64ShrUImm16Rev, execute_i64_shr_u_imm16, UntypedVal::i64_shr_u),
(i64, Instruction::I64ShrSImm16Rev, execute_i64_shr_s_imm16, UntypedVal::i64_shr_s),
(i64, Instruction::I64RotlImm16Rev, execute_i64_rotl_imm16, UntypedVal::i64_rotl),
(i64, Instruction::I64RotrImm16Rev, execute_i64_rotr_imm16, UntypedVal::i64_rotr),
}
}

Expand Down
4 changes: 2 additions & 2 deletions crates/wasmi/src/engine/translator/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1676,7 +1676,7 @@ impl FuncTranslator {
&mut self,
make_instr: fn(result: Reg, lhs: Reg, rhs: Reg) -> Instruction,
make_instr_by: fn(result: Reg, lhs: Reg, rhs: ShiftAmount<T>) -> Instruction,
make_instr_imm16_rev: fn(result: Reg, lhs: Const16<T>, rhs: Reg) -> Instruction,
make_instr_imm16: fn(result: Reg, lhs: Const16<T>, rhs: Reg) -> Instruction,
consteval: fn(TypedVal, TypedVal) -> TypedVal,
make_instr_imm_reg_opt: fn(&mut Self, lhs: T, rhs: Reg) -> Result<bool, Error>,
) -> Result<(), Error>
Expand Down Expand Up @@ -1709,7 +1709,7 @@ impl FuncTranslator {
self.alloc.stack.push_const(lhs);
return Ok(());
}
if self.try_push_binary_instr_imm16_rev(T::from(lhs), rhs, make_instr_imm16_rev)? {
if self.try_push_binary_instr_imm16_rev(T::from(lhs), rhs, make_instr_imm16)? {
// Optimization was applied: return early.
return Ok(());
}
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i32_rotl.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_rotl_imm16_lhs)
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_rotl_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i32_rotr.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_rotr_imm16_lhs)
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_rotr_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i32_shl.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shl_imm16_lhs)
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shl_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i32_shr_s.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shr_s_imm16_lhs)
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shr_s_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i32_shr_u.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shr_u_imm16_lhs)
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_shr_u_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i64_rotl.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_rotl_imm16_lhs)
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_rotl_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i64_rotr.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_rotr_imm16_lhs)
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_rotr_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i64_shl.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shl_imm16_lhs)
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shl_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i64_shr_s.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shr_s_imm16_lhs)
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shr_s_imm16)
}

#[test]
Expand Down
2 changes: 1 addition & 1 deletion crates/wasmi/src/engine/translator/tests/op/binary/i64_shr_u.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ fn reg_imm_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shr_u_imm16_lhs)
test_binary_reg_imm16_lhs::<i64>(WASM_OP, 100, Instruction::i64_shr_u_imm16)
}

#[test]
Expand Down
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