rename instructions with immediate ShiftAmount

crates/ir/src/for_each_op.rs

@@ -4018,8 +4018,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i32.shl` equivalent Wasmi instruction with 16-bit immediate `rhs` operand.
-            #[snake_name(i32_shl_imm)]
-            I32ShlImm {
+            #[snake_name(i32_shl_by)]
+            I32ShlBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4046,8 +4046,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i32.shr_u` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i32_shr_u_imm)]
-            I32ShrUImm {
+            #[snake_name(i32_shr_u_by)]
+            I32ShrUBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4074,8 +4074,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i32.shr_s` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i32_shr_s_imm)]
-            I32ShrSImm {
+            #[snake_name(i32_shr_s_by)]
+            I32ShrSBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4102,8 +4102,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i32.rotl` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i32_rotl_imm)]
-            I32RotlImm {
+            #[snake_name(i32_rotl_by)]
+            I32RotlBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4130,8 +4130,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i32.rotr` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i32_rotr_imm)]
-            I32RotrImm {
+            #[snake_name(i32_rotr_by)]
+            I32RotrBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4478,8 +4478,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i64.shl` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i64_shl_imm)]
-            I64ShlImm {
+            #[snake_name(i64_shl_by)]
+            I64ShlBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4506,8 +4506,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i64.shr_u` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i64_shr_u_imm)]
-            I64ShrUImm {
+            #[snake_name(i64_shr_u_by)]
+            I64ShrUBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4534,8 +4534,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i64.shr_s` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i64_shr_s_imm)]
-            I64ShrSImm {
+            #[snake_name(i64_shr_s_by)]
+            I64ShrSBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4562,8 +4562,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i64.rotl` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i64_rotl_imm)]
-            I64RotlImm {
+            #[snake_name(i64_rotl_by)]
+            I64RotlBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,
@@ -4590,8 +4590,8 @@ macro_rules! for_each_op {
                 rhs: Reg,
             },
             /// A Wasm `i64.rotr` equivalent Wasmi instruction with 16-bit immediate `rhs` value.
-            #[snake_name(i64_rotr_imm)]
-            I64RotrImm {
+            #[snake_name(i64_rotr_by)]
+            I64RotrBy {
                 @result: Reg,
                 /// The register holding one of the operands.
                 lhs: Reg,

crates/wasmi/src/engine/executor/instrs.rs

@@ -968,35 +968,31 @@ impl<'engine> Executor<'engine> {
                     self.execute_i32_xor_imm16(result, lhs, rhs)
                 }
                 Instr::I32Shl { result, lhs, rhs } => self.execute_i32_shl(result, lhs, rhs),
-                Instr::I32ShlImm { result, lhs, rhs } => self.execute_i32_shl_imm(result, lhs, rhs),
+                Instr::I32ShlBy { result, lhs, rhs } => self.execute_i32_shl_by(result, lhs, rhs),
                 Instr::I32ShlImm16Lhs { result, lhs, rhs } => {
                     self.execute_i32_shl_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I32ShrU { result, lhs, rhs } => self.execute_i32_shr_u(result, lhs, rhs),
-                Instr::I32ShrUImm { result, lhs, rhs } => {
-                    self.execute_i32_shr_u_imm(result, lhs, rhs)
+                Instr::I32ShrUBy { result, lhs, rhs } => {
+                    self.execute_i32_shr_u_by(result, lhs, rhs)
                 }
                 Instr::I32ShrUImm16Lhs { result, lhs, rhs } => {
                     self.execute_i32_shr_u_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I32ShrS { result, lhs, rhs } => self.execute_i32_shr_s(result, lhs, rhs),
-                Instr::I32ShrSImm { result, lhs, rhs } => {
-                    self.execute_i32_shr_s_imm(result, lhs, rhs)
+                Instr::I32ShrSBy { result, lhs, rhs } => {
+                    self.execute_i32_shr_s_by(result, lhs, rhs)
                 }
                 Instr::I32ShrSImm16Lhs { result, lhs, rhs } => {
                     self.execute_i32_shr_s_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I32Rotl { result, lhs, rhs } => self.execute_i32_rotl(result, lhs, rhs),
-                Instr::I32RotlImm { result, lhs, rhs } => {
-                    self.execute_i32_rotl_imm(result, lhs, rhs)
-                }
+                Instr::I32RotlBy { result, lhs, rhs } => self.execute_i32_rotl_by(result, lhs, rhs),
                 Instr::I32RotlImm16Lhs { result, lhs, rhs } => {
                     self.execute_i32_rotl_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I32Rotr { result, lhs, rhs } => self.execute_i32_rotr(result, lhs, rhs),
-                Instr::I32RotrImm { result, lhs, rhs } => {
-                    self.execute_i32_rotr_imm(result, lhs, rhs)
-                }
+                Instr::I32RotrBy { result, lhs, rhs } => self.execute_i32_rotr_by(result, lhs, rhs),
                 Instr::I32RotrImm16Lhs { result, lhs, rhs } => {
                     self.execute_i32_rotr_imm16_lhs(result, lhs, rhs)
                 }
@@ -1056,35 +1052,31 @@ impl<'engine> Executor<'engine> {
                     self.execute_i64_xor_imm16(result, lhs, rhs)
                 }
                 Instr::I64Shl { result, lhs, rhs } => self.execute_i64_shl(result, lhs, rhs),
-                Instr::I64ShlImm { result, lhs, rhs } => self.execute_i64_shl_imm(result, lhs, rhs),
+                Instr::I64ShlBy { result, lhs, rhs } => self.execute_i64_shl_by(result, lhs, rhs),
                 Instr::I64ShlImm16Lhs { result, lhs, rhs } => {
                     self.execute_i64_shl_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I64ShrU { result, lhs, rhs } => self.execute_i64_shr_u(result, lhs, rhs),
-                Instr::I64ShrUImm { result, lhs, rhs } => {
-                    self.execute_i64_shr_u_imm(result, lhs, rhs)
+                Instr::I64ShrUBy { result, lhs, rhs } => {
+                    self.execute_i64_shr_u_by(result, lhs, rhs)
                 }
                 Instr::I64ShrUImm16Lhs { result, lhs, rhs } => {
                     self.execute_i64_shr_u_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I64ShrS { result, lhs, rhs } => self.execute_i64_shr_s(result, lhs, rhs),
-                Instr::I64ShrSImm { result, lhs, rhs } => {
-                    self.execute_i64_shr_s_imm(result, lhs, rhs)
+                Instr::I64ShrSBy { result, lhs, rhs } => {
+                    self.execute_i64_shr_s_by(result, lhs, rhs)
                 }
                 Instr::I64ShrSImm16Lhs { result, lhs, rhs } => {
                     self.execute_i64_shr_s_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I64Rotl { result, lhs, rhs } => self.execute_i64_rotl(result, lhs, rhs),
-                Instr::I64RotlImm { result, lhs, rhs } => {
-                    self.execute_i64_rotl_imm(result, lhs, rhs)
-                }
+                Instr::I64RotlBy { result, lhs, rhs } => self.execute_i64_rotl_by(result, lhs, rhs),
                 Instr::I64RotlImm16Lhs { result, lhs, rhs } => {
                     self.execute_i64_rotl_imm16_lhs(result, lhs, rhs)
                 }
                 Instr::I64Rotr { result, lhs, rhs } => self.execute_i64_rotr(result, lhs, rhs),
-                Instr::I64RotrImm { result, lhs, rhs } => {
-                    self.execute_i64_rotr_imm(result, lhs, rhs)
-                }
+                Instr::I64RotrBy { result, lhs, rhs } => self.execute_i64_rotr_by(result, lhs, rhs),
                 Instr::I64RotrImm16Lhs { result, lhs, rhs } => {
                     self.execute_i64_rotr_imm16_lhs(result, lhs, rhs)
                 }

crates/wasmi/src/engine/executor/instrs/binary.rs

@@ -110,17 +110,17 @@ macro_rules! impl_shift_by {
 }
 impl Executor<'_> {
     impl_shift_by! {
-        (i32, Instruction::I32ShlImm, execute_i32_shl_imm, UntypedVal::i32_shl),
-        (i32, Instruction::I32ShrUImm, execute_i32_shr_u_imm, UntypedVal::i32_shr_u),
-        (i32, Instruction::I32ShrSImm, execute_i32_shr_s_imm, UntypedVal::i32_shr_s),
-        (i32, Instruction::I32RotlImm, execute_i32_rotl_imm, UntypedVal::i32_rotl),
-        (i32, Instruction::I32RotrImm, execute_i32_rotr_imm, UntypedVal::i32_rotr),
-
-        (i64, Instruction::I64ShlImm, execute_i64_shl_imm, UntypedVal::i64_shl),
-        (i64, Instruction::I64ShrUImm, execute_i64_shr_u_imm, UntypedVal::i64_shr_u),
-        (i64, Instruction::I64ShrSImm, execute_i64_shr_s_imm, UntypedVal::i64_shr_s),
-        (i64, Instruction::I64RotlImm, execute_i64_rotl_imm, UntypedVal::i64_rotl),
-        (i64, Instruction::I64RotrImm, execute_i64_rotr_imm, UntypedVal::i64_rotr),
+        (i32, Instruction::I32ShlImm, execute_i32_shl_by, UntypedVal::i32_shl),
+        (i32, Instruction::I32ShrUImm, execute_i32_shr_u_by, UntypedVal::i32_shr_u),
+        (i32, Instruction::I32ShrSImm, execute_i32_shr_s_by, UntypedVal::i32_shr_s),
+        (i32, Instruction::I32RotlImm, execute_i32_rotl_by, UntypedVal::i32_rotl),
+        (i32, Instruction::I32RotrImm, execute_i32_rotr_by, UntypedVal::i32_rotr),
+
+        (i64, Instruction::I64ShlImm, execute_i64_shl_by, UntypedVal::i64_shl),
+        (i64, Instruction::I64ShrUImm, execute_i64_shr_u_by, UntypedVal::i64_shr_u),
+        (i64, Instruction::I64ShrSImm, execute_i64_shr_s_by, UntypedVal::i64_shr_s),
+        (i64, Instruction::I64RotlImm, execute_i64_rotl_by, UntypedVal::i64_rotl),
+        (i64, Instruction::I64RotrImm, execute_i64_rotr_by, UntypedVal::i64_rotr),
 
     }
 }

crates/wasmi/src/engine/translator/mod.rs

@@ -1675,7 +1675,7 @@ impl FuncTranslator {
     fn translate_shift<T>(
         &mut self,
         make_instr: fn(result: Reg, lhs: Reg, rhs: Reg) -> Instruction,
-        make_instr_imm: fn(result: Reg, lhs: Reg, rhs: ShiftAmount<T>) -> Instruction,
+        make_instr_by: fn(result: Reg, lhs: Reg, rhs: ShiftAmount<T>) -> Instruction,
         make_instr_imm16_rev: fn(result: Reg, lhs: Const16<T>, rhs: Reg) -> Instruction,
         consteval: fn(TypedVal, TypedVal) -> TypedVal,
         make_instr_imm_reg_opt: fn(&mut Self, lhs: T, rhs: Reg) -> Result<bool, Error>,
@@ -1696,7 +1696,7 @@ impl FuncTranslator {
                     return Ok(());
                 };
                 let result = self.alloc.stack.push_dynamic()?;
-                self.push_fueled_instr(make_instr_imm(result, lhs, rhs), FuelCosts::base)?;
+                self.push_fueled_instr(make_instr_by(result, lhs, rhs), FuelCosts::base)?;
                 Ok(())
             }
             (TypedProvider::Const(lhs), TypedProvider::Register(rhs)) => {

crates/wasmi/src/engine/translator/tests/op/binary/i32_rotl.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i32_rotl_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i32_rotl_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i32_rotr.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i32_rotr_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i32_rotr_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i32_shl.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i32_shl_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i32_shl_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i32_shr_s.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i32_shr_s_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i32_shr_s_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i32_shr_u.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i32_shr_u_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i32_shr_u_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i64_rotl.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i64_rotl_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i64_rotl_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i64_rotr.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i64_rotr_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i64_rotr_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i64_shl.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i64_shl_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i64_shl_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i64_shr_s.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i64_shr_s_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i64_shr_s_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();

crates/wasmi/src/engine/translator/tests/op/binary/i64_shr_u.rs

@@ -40,7 +40,7 @@ fn reg_0_after_mod32() {
 #[cfg_attr(miri, ignore)]
 fn reg_1_after_mod32() {
     let expected = [
-        Instruction::i64_shr_u_imm(Reg::from(1), Reg::from(0), shamt(1)),
+        Instruction::i64_shr_u_by(Reg::from(1), Reg::from(0), shamt(1)),
         Instruction::return_reg(1),
     ];
     test_binary_reg_imm_with(WASM_OP, 1_i32, expected).run();