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Base implementation of the MMU + TLB + Exceptions #4

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Base implementation of the MMU + TLB + Exceptions #4

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db3ee88
chore: add new deps
dignifiedquire Aug 22, 2018
0027d09
feat(cpu): implement mi registers
dignifiedquire Aug 22, 2018
f7e25df
feat(fpu): gracefully handle unknown fmts
dignifiedquire Aug 22, 2018
f7adc33
feat(cp0): add missing registers
dignifiedquire Aug 22, 2018
14bac10
feat(pi): implement status and read dma
dignifiedquire Aug 23, 2018
592cd5d
refactor(cp0): use constants instead of enum
dignifiedquire Aug 23, 2018
f890095
feat(cp0): initial setup for address regions
dignifiedquire Aug 25, 2018
70168fb
feat(segment): improved lookups
dignifiedquire Aug 25, 2018
d359ce7
start tlb impl
dignifiedquire Aug 25, 2018
b169ab2
implement tlb opcodes
dignifiedquire Aug 26, 2018
9223ad0
remove debug file
dignifiedquire Aug 26, 2018
c876c2c
wip: exception handling
dignifiedquire Aug 26, 2018
c705ed2
cleanup and set registers on tlb exceptions
dignifiedquire Aug 26, 2018
5e1d747
add some more sp registers
dignifiedquire Aug 26, 2018
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82 changes: 82 additions & 0 deletions Cargo.lock
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4 changes: 4 additions & 0 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,11 @@ crc = "^1.0.0"
lazy_static = "1.0"
bitflags = "1.0"
bit_field = "0.9.0"
bitfield = "0.13.0"
enum-map = "0.4.0"
phf = "0.7.21"
phf_macros = "0.7.22"
rand = "0.5.5"

[dev-dependencies]
image = "0.13"
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15 changes: 15 additions & 0 deletions src/lib.rs
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Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
#![feature(attr_literals)]
#![feature(stdsimd)]
#![feature(plugin)]
#![plugin(phf_macros)]
#![feature(test)]

#[macro_use]
extern crate slog;
Expand All @@ -14,9 +17,21 @@ extern crate packed_simd;
#[macro_use]
extern crate bitflags;

extern crate bit_field;

#[macro_use]
extern crate bitfield;

#[macro_use]
extern crate error_chain;

extern crate phf;

extern crate rand;

#[cfg(test)]
extern crate test;

pub mod errors {
error_chain!{
foreign_links {
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