2018 06_Report

ARTIQ

Sayma

The RTM FPGA bitstream is now loaded actively by the firmware on the AMC FPGA CPU. This requires rework of the RTM for slave serial loading. This in turn disables the DAC TXEN hardware pin functionality.

The test patterns for the "no SAWG" build option have changed and are now optimized to expose signal quality and glitch problems.

Sinara

We have produced high quality photographs of the Sinara hardware collection. This can be used for promotion and in talks/posters.