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driver: sensor: adxl372: Formating fixed
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Fixed some formating issues.

Signed-off-by: Vladislav Pejic <[email protected]>
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@vladislav-pejic
vladislav-pejic committed Oct 1, 2024
1 parent 90878cb commit 53cdb2c
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Showing 4 changed files with 24 additions and 24 deletions.
8 changes: 4 additions & 4 deletions drivers/sensor/adi/adxl372/adxl372.c
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Original file line number Diff line number Diff line change
Expand Up @@ -422,11 +422,10 @@ static int adxl372_reset(const struct device *dev)
* @param fifo_samples - FIFO Samples. Watermark number of FIFO samples that
* triggers a FIFO_FULL condition when reached.
* Values range from 0 to 512.
* @return 0 in case of success, negative error code otherwise.
*/
int adxl372_configure_fifo(const struct device *dev, enum adxl372_fifo_mode mode,
enum adxl372_fifo_format format, uint16_t fifo_samples)
enum adxl372_fifo_format format, uint16_t fifo_samples)
{
struct adxl372_data *data = dev->data;
uint8_t fifo_config;
Expand Down Expand Up @@ -825,8 +824,9 @@ static int adxl372_init(const struct device *dev)
*/
#define ADXL372_SPI_CFG SPI_WORD_SET(8) | SPI_TRANSFER_MSB

#define ADXL372_RTIO_DEFINE(inst) \
SPI_DT_IODEV_DEFINE(adxl372_iodev_##inst, DT_DRV_INST(inst), ADXL372_SPI_CFG, 0U); \
#define ADXL372_RTIO_DEFINE(inst) \
SPI_DT_IODEV_DEFINE(adxl372_iodev_##inst, DT_DRV_INST(inst), \
ADXL372_SPI_CFG, 0U); \
RTIO_DEFINE(adxl372_rtio_ctx_##inst, 8, 8);

#ifdef CONFIG_ADXL372_TRIGGER
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5 changes: 3 additions & 2 deletions drivers/sensor/adi/adxl372/adxl372.h
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Original file line number Diff line number Diff line change
Expand Up @@ -389,7 +389,8 @@ struct adxl372_fifo_data {
uint64_t timestamp;
} __attribute__((__packed__));

BUILD_ASSERT(sizeof(struct adxl372_fifo_data) % 4 == 0, "adxl372_fifo_data struct should be word aligned");
BUILD_ASSERT(sizeof(struct adxl372_fifo_data) % 4 == 0,
"adxl372_fifo_data struct should be word aligned");

int adxl372_spi_init(const struct device *dev);
int adxl372_i2c_init(const struct device *dev);
Expand Down Expand Up @@ -418,7 +419,7 @@ void adxl372_accel_convert(struct sensor_value *val, int16_t sample);

#ifdef CONFIG_ADXL372_STREAM
int adxl372_configure_fifo(const struct device *dev, enum adxl372_fifo_mode mode,
enum adxl372_fifo_format format, uint16_t fifo_samples);
enum adxl372_fifo_format format, uint16_t fifo_samples);
size_t adxl372_get_packet_size(const struct adxl372_dev_config *cfg);
int adxl372_set_op_mode(const struct device *dev, enum adxl372_op_mode op_mode);
#endif /* CONFIG_ADXL372_STREAM */
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2 changes: 1 addition & 1 deletion drivers/sensor/adi/adxl372/adxl372_rtio.c
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Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ void adxl372_submit(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe)
__ASSERT_NO_MSG(req);

rtio_work_req_submit(req, iodev_sqe, adxl372_submit_fetch);
} else if(IS_ENABLED(CONFIG_ADXL372_STREAM)) {
} else if (IS_ENABLED(CONFIG_ADXL372_STREAM)) {
adxl372_submit_stream(dev, iodev_sqe);
} else {
rtio_iodev_sqe_err(iodev_sqe, -ENOTSUP);
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33 changes: 16 additions & 17 deletions drivers/sensor/adi/adxl372/adxl372_stream.c
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Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ static void adxl372_fifo_read_cb(struct rtio *rtio_ctx, const struct rtio_sqe *s
size_t adxl372_get_packet_size(const struct adxl372_dev_config *cfg)
{
/* If one sample contains XYZ values. */
size_t packet_size = 6;
size_t packet_size;

switch (cfg->fifo_config.fifo_format) {
case ADXL372_X_FIFO:
Expand All @@ -94,6 +94,7 @@ size_t adxl372_get_packet_size(const struct adxl372_dev_config *cfg)
break;

default:
packet_size = 6;
break;
}

Expand All @@ -115,7 +116,7 @@ static void adxl372_process_fifo_samples_cb(struct rtio *r, const struct rtio_sq
if (fifo_samples > sample_set_size/2) {
fifo_samples -= sample_set_size/2;
} else {
LOG_ERR("fifo sample caunt error %d\n", fifo_samples);
LOG_ERR("fifo sample count error %d\n", fifo_samples);
gpio_pin_interrupt_configure_dt(&cfg->interrupt, GPIO_INT_EDGE_TO_ACTIVE);
return;
}
Expand Down Expand Up @@ -147,39 +148,37 @@ static void adxl372_process_fifo_samples_cb(struct rtio *r, const struct rtio_sq
(unsigned int)ideal_read_size, buf_len);

/* Read FIFO and call back to rtio with rtio_sqe completion */
struct adxl372_fifo_data hdr = {
.is_fifo = 1,
.timestamp = data->timestamp,
.int_status = data->status1,
.accel_odr = cfg->odr,
.sample_set_size = sample_set_size,
};
struct adxl372_fifo_data *hdr = (struct adxl372_fifo_data *) buf;
hdr->is_fifo = 1;
hdr->timestamp = data->timestamp;
hdr->int_status = data->status1;
hdr->accel_odr = cfg->odr;
hdr->sample_set_size = sample_set_size;

if ((cfg->fifo_config.fifo_format == ADXL372_X_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XY_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XZ_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XYZ_FIFO)) {
hdr.has_x = 1;
hdr->has_x = 1;
}

if ((cfg->fifo_config.fifo_format == ADXL372_Y_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XY_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_YZ_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XYZ_FIFO)) {
hdr.has_y = 1;
hdr->has_y = 1;
}

if ((cfg->fifo_config.fifo_format == ADXL372_Z_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XZ_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_YZ_FIFO) ||
(cfg->fifo_config.fifo_format == ADXL372_XYZ_FIFO)) {
hdr.has_z = 1;
hdr->has_z = 1;
}

uint32_t buf_avail = buf_len;

memcpy(buf, &hdr, sizeof(hdr));
buf_avail -= sizeof(hdr);
buf_avail -= sizeof(*hdr);

uint32_t read_len = MIN(fifo_bytes, buf_avail);
uint32_t pkts = read_len / sample_set_size;
Expand All @@ -190,7 +189,7 @@ static void adxl372_process_fifo_samples_cb(struct rtio *r, const struct rtio_sq

__ASSERT_NO_MSG(read_len % pkt_size == 0);

uint8_t *read_buf = buf + sizeof(hdr);
uint8_t *read_buf = buf + sizeof(*hdr);

/* Flush completions */
struct rtio_cqe *cqe;
Expand Down Expand Up @@ -319,9 +318,9 @@ static void adxl372_process_status1_cb(struct rtio *r, const struct rtio_sqe *sq
enum adxl372_fifo_mode current_fifo_mode = cfg->fifo_config.fifo_mode;

adxl372_configure_fifo(dev, ADXL372_FIFO_BYPASSED,
cfg->fifo_config.fifo_format, cfg->fifo_config.fifo_samples);
cfg->fifo_config.fifo_format, cfg->fifo_config.fifo_samples);
adxl372_configure_fifo(dev, current_fifo_mode, cfg->fifo_config.fifo_format,
cfg->fifo_config.fifo_samples);
cfg->fifo_config.fifo_samples);
adxl372_set_op_mode(dev, cfg->op_mode);
}

Expand Down

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