[Packer] Setting Higher Target Pin Utilization When Regions are Full

[AlexandreSinger]

The packer currently has a fallback where, if it could not pack after 4 iterations, it will increase the target pin utilization of the clusters to give it a better chance of finding a valid clustering (at the expense of runtime):

vtr-verilog-to-routing/vpr/src/pack/pack.cpp

Lines 195 to 208 in e38c0f3

	} else if (pack_iteration == 4) {
	attraction_groups.create_att_groups_for_all_regions();
	VTR_LOG("Floorplan regions are overfull: trying to pack again with more attraction groups exploration and higher target pin utilization. \n");
	VTR_LOG("Pack iteration is %d\n", pack_iteration);
	attraction_groups.set_att_group_pulls(4);
	t_ext_pin_util pin_util(1.0, 1.0);
	// TODO: This line assumes the logic block name is "clb" which
	// may not be the case. This may need to be investigated.
	// Probably we should do this update of ext_pin_util for
	// all types that were overused. Or if that is hard, just
	// do it for all block types. Doing it only for a clb
	// string is dangerous -VB.
	cluster_legalizer.get_target_external_pin_util().set_block_pin_util("clb", pin_util);
	}

As the TODO reads, this was implemented in a very hard-coded way. It assumes the logic block type which was having issues is the clbs and the name is "clb".

This should either increase the target pin utilization for the overused block types or it should just increase the target pin utilization for all logical block types.