Merge pull request #44 from upb-lea/buckconverterss24

Buckconverterss24

LEA_Footprint_Library.pretty/QFN50P300X400X80-21N-D.kicad_mod

@@ -65,86 +65,76 @@
 		)
 	)
 	(attr smd)
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+			(width 0.1)
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-		(layer "F.CrtYd")
-		(uuid "3ce0f40b-4c56-4b84-b4ed-1c2b2574b8cc")
+		(layer "F.SilkS")
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 	)
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-		(start -2.125 2.625)
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+			(width 0.1)
 			(type solid)
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-		(layer "F.CrtYd")
-		(uuid "d6d6b030-9e10-412f-838e-67daaea9d1a2")
+		(layer "F.SilkS")
+		(uuid "30f6d7c0-4e4d-4150-b079-e7f8f17c5117")
 	)
 	(fp_line
-		(start -1.5 -2)
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+		(start 1.5 -2)
+		(end 1.5 2)
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 			(type solid)
 		)
-		(layer "F.CrtYd")
-		(uuid "2ec4b121-baf7-4414-be67-72932e4bfc98")
+		(layer "F.SilkS")
+		(uuid "d4284050-262d-41ff-86a2-9733585088c8")
 	)
 	(fp_line
-		(start -1.5 -1.5)
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 			(type solid)
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-		(layer "F.CrtYd")
-		(uuid "189acb59-3640-4e57-8f30-22b1cea72188")
+		(layer "F.SilkS")
+		(uuid "2d9d2f11-9c2c-4fff-86a6-97cc5eb3de8d")
 	)
-	(fp_line
-		(start -1.5 2)
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+	(fp_circle
+		(center -1.8 -2.3)
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 		(stroke
-			(width 0.1)
+			(width 0.254)
 			(type solid)
 		)
-		(layer "F.CrtYd")
-		(uuid "30f6d7c0-4e4d-4150-b079-e7f8f17c5117")
+		(fill none)
+		(layer "F.SilkS")
+		(uuid "803dc091-9596-444a-8712-099042717312")
 	)
 	(fp_line
-		(start 1.5 -2)
-		(end 1.5 2)
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 		(stroke
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+			(width 0.05)
 			(type solid)
 		)
 		(layer "F.CrtYd")
-		(uuid "d4284050-262d-41ff-86a2-9733585088c8")
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 	)
 	(fp_line
-		(start 1.5 2)
-		(end -1.5 2)
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 		(stroke
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 			(type solid)
 		)
 		(layer "F.CrtYd")
-		(uuid "2d9d2f11-9c2c-4fff-86a6-97cc5eb3de8d")
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 	(fp_line
 		(start 2.125 -2.625)

README.md

@@ -116,3 +116,10 @@ Examples:
  * `ST_6CH_CMOS_SOIC14_MC74HC14ADG`
 
 
+## Checklist Layout order
+ * Schematic: generate BOM, check if all components are available using [KiCost](https://github.com/hildogjr/KiCost)
+ * Schematic: all potentials have a NetClass 
+ * Schematic: free of failures and warnings using Electrical Rules Checker (ERC)
+ * PCB: fiducials (2 on top layer, 2 on bottom layer)
+ * PCB: spacing rules generation using [KiClearance](https://github.com/upb-lea/KiClearance)
+ * PCB: free of failures and warnings in Design Rules Checker (DRC)

sources/wordlist

@@ -46,4 +46,8 @@ THT
 Microcontrollers
 ICs
 Schmitt
-
+NetClass
+ERC
+fiducials
+KiClearance
+DRC