v1.2.4

Fix

(#176) Fixed an enable signal bug for single delay shift registers.
(#181) Update MuxInOuts trait to take into account change to diplomacy.Nodes.scala:makeIOs
(#183) Fix peekAt argument type.
(#186) Bump external chisel test dependencies.
(#187) Bump travis dependencies.
(#188) Adjust to the change in global LogLevel from None to Warn.
(#190) Change log defaults text from "error" to "warn"
(#193) Bump sbt and tool/plugin dependencies.
(#194) Use the same version of verilator as firrtl
(#195) Correct a typo in BinaryRepresentation.scala

Feature

(#178) Bump deps, and clean up some imports
(#180) Add mux2; add tests for stream mux; add AXI4-Stream mux
(#182) Add a set of deterministic rounding modes.