riscv: dts: Add full JH7100, Starlight and VisionFive support

Based on the device tree in https://github.com/starfive-tech/u-boot/ with contributions from: yanhong.wang <[email protected]> Huan.Feng <[email protected]> ke.zhu <[email protected]> yiming.li <[email protected]> jack.zhu <[email protected]> Samin Guo <[email protected]> Chenjieqin <[email protected]> bo.li <[email protected]> Rearranged, cleanups, fixes, pins and resets added by Emil. Cleanups, fixes, clocks added by Geert. Cleanups and GPIO fixes from Drew. Thermal zone added by Stephen. PWM pins added by Jianlong. cpu-map added by Jonas. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Stephen L Arnold <[email protected]> Signed-off-by: Drew Fustini <[email protected]> Signed-off-by: Jianlong Huang <[email protected]> Signed-off-by: Jonas Hahnfeld <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]>
starfive-tech · Apr 13, 2024 · 821a60d · 821a60d
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commit 821a60d
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diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,10 +1,12 @@
 # SPDX-License-Identifier: GPL-2.0
 # Enables support for device-tree overlays
+DTC_FLAGS_jh7100-beaglev-starlight-a1 := -@
 DTC_FLAGS_jh7100-beaglev-starlight := -@
 DTC_FLAGS_jh7100-starfive-visionfive-v1 := -@
 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.2a := -@
 DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
 
+dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight-a1.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
 dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
 

diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight-a1.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight-a1.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 Emil Renner Berthing <[email protected]>
+ */
+
+/dts-v1/;
+#include "jh7100-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "BeagleV Starlight Beta A1";
+	compatible = "beagle,beaglev-starlight-jh7100-a1", "starfive,jh7100";
+
+	gpio-restart {
+		compatible = "gpio-restart";
+		gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
+		priority = <224>;
+	};
+};
+
+&gpio {
+	/* don't reset gpio mux for serial console and reset gpio */
+	starfive,keep-gpiomux = <13 14 63>;
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "jh7100-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "BeagleV Starlight Beta";
@@ -16,6 +17,11 @@
 	phy-handle = <&phy>;
 };
 
+&gpio {
+	/* don't reset gpio mux for serial console on uart3 */
+	starfive,keep-gpiomux = <13 14>;
+};
+
 &mdio {
 	phy: ethernet-phy@7 {
 		reg = <7>;

diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
@@ -15,6 +15,7 @@
 		mmc0 = &sdio0;
 		mmc1 = &sdio1;
 		serial0 = &uart3;
+		serial1 = &uart0;
 	};
 
 	chosen {
@@ -47,11 +48,41 @@
 		#size-cells = <2>;
 		ranges;
 
+		linux,cma {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0x0 0xa0000000 0x0 0x28000000>;
+			size = <0x0 0x28000000>;
+			alignment = <0x0 0x1000>;
+			reusable;
+			linux,cma-default;
+		};
+
+		jpu_reserved: framebuffer@c9000000 {
+			reg = <0x0 0xc9000000 0x0 0x4000000>;
+		};
+
+		nvdla_reserved: framebuffer@d0000000 {
+			reg = <0x0 0xd0000000 0x0 0x28000000>;
+			no-map;
+		};
+
+		vin_reserved: framebuffer@f9000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0xf9000000 0x0 0x1000000>;
+			no-map;
+		};
+
 		dma-reserved@fa000000 {
 			reg = <0x0 0xfa000000 0x0 0x1000000>;
 			no-map;
 		};
 
+		sffb_reserved: framebuffer@fb000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0xfb000000 0x0 0x2000000>;
+			no-map;
+		};
+
 		linux,dma@107a000000 {
 			compatible = "shared-dma-pool";
 			reg = <0x10 0x7a000000 0x0 0x1000000>;
@@ -72,6 +103,44 @@
 	};
 };
 
+&display {
+	memory-region = <&sffb_reserved>;
+	status = "okay";
+};
+
+&crtc {
+	ddr-format = <4>; //<WIN_FMT_RGB565>;
+	status = "okay";
+
+	port: port@0 {
+		reg = <0>;
+
+		crtc_0_out: endpoint {
+			remote-endpoint = <&hdmi_input0>;
+		};
+	};
+};
+
+&encoder {
+	encoder-type = <2>; // 2-TMDS, 3-LVDS, 6-DSI, 8-DPI
+	status = "okay";
+
+	ports {
+		port@0 {
+			hdmi_out: endpoint {
+				remote-endpoint = <&tda998x_0_input>;
+			};
+		};
+
+		port@1 {
+			hdmi_input0: endpoint {
+				remote-endpoint = <&crtc_0_out>;
+			};
+		};
+
+	};
+};
+
 &gmac {
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac_pins>;
@@ -199,6 +268,20 @@
 		};
 	};
 
+	pwmdac_pins: pwmdac-0 {
+		pwmdac-pins {
+			pinmux = <GPIOMUX(23, GPO_PWMDAC_LEFT_OUT,
+				  GPO_ENABLE, GPI_NONE)>,
+				 <GPIOMUX(24, GPO_PWMDAC_RIGHT_OUT,
+				  GPO_ENABLE, GPI_NONE)>;
+			bias-disable;
+			drive-strength = <35>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+
 	pwm_pins: pwm-0 {
 		pwm-pins {
 			pinmux = <GPIOMUX(7,
@@ -289,6 +372,62 @@
 		};
 	};
 
+	spi2_pins: spi2-0 {
+		mosi-pins {
+			pinmux = <GPIOMUX(18, GPO_SPI2_PAD_TXD,
+				  GPO_ENABLE, GPI_NONE)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+		miso-pins {
+			pinmux = <GPIOMUX(16, GPO_LOW, GPO_DISABLE,
+				  GPI_SPI2_PAD_RXD)>;
+			bias-pull-up;
+			input-enable;
+			input-schmitt-enable;
+		};
+		sck-pins {
+			pinmux = <GPIOMUX(12, GPO_SPI2_PAD_SCK_OUT,
+				  GPO_ENABLE, GPI_NONE)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+		ss-pins {
+			pinmux = <GPIOMUX(15, GPO_SPI2_PAD_SS_0_N,
+				  GPO_ENABLE, GPI_NONE)>,
+				 <GPIOMUX(11, GPO_SPI2_PAD_SS_1_N,
+				  GPO_ENABLE, GPI_NONE)>;
+			bias-disable;
+			input-disable;
+			input-schmitt-disable;
+		};
+	};
+
+	uart0_pins: uart0-0 {
+		rx-pins {
+			pinmux = <GPIOMUX(40, GPO_LOW, GPO_DISABLE,
+				  GPI_UART0_PAD_SIN)>,
+				 <GPIOMUX(39, GPO_LOW, GPO_DISABLE,
+				  GPI_UART0_PAD_CTSN)>;
+			bias-pull-up;
+			drive-strength = <14>;
+			input-enable;
+			input-schmitt-enable;
+		};
+		tx-pins {
+			pinmux = <GPIOMUX(41, GPO_UART0_PAD_SOUT,
+				  GPO_ENABLE, GPI_NONE)>,
+				 <GPIOMUX(42, GPO_UART0_PAD_RTSN,
+				  GPO_ENABLE, GPI_NONE)>;
+			bias-disable;
+			drive-strength = <35>;
+			input-disable;
+			input-schmitt-disable;
+		};
+	};
+
 	uart3_pins: uart3-0 {
 		rx-pins {
 			pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
@@ -329,6 +468,17 @@
 		regulators {
 		};
 	};
+
+	tda998x@70 {
+		compatible = "nxp,tda998x";
+		reg = <0x70>;
+
+		port {
+			tda998x_0_input: endpoint {
+				remote-endpoint = <&hdmi_out>;
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -365,6 +515,44 @@
 	status = "okay";
 };
 
+&pwmdac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwmdac_pins>;
+	status = "okay";
+};
+
+&qspi {
+	nor_flash: nor-flash@0 {
+		compatible = "spi-flash";
+		reg = <0>;
+		spi-max-frequency = <31250000>;
+		page-size = <256>;
+		block-size = <16>;
+		cdns,read-delay = <4>;
+		cdns,tshsl-ns = <1>;
+		cdns,tsd2d-ns = <1>;
+		cdns,tchsh-ns = <1>;
+		cdns,tslch-ns = <1>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+
+	nand_flash: nand-flash@1 {
+		compatible = "spi-flash-nand";
+		reg = <1>;
+		spi-max-frequency = <31250000>;
+		page-size = <2048>;
+		block-size = <17>;
+		cdns,read-delay = <4>;
+		cdns,tshsl-ns = <1>;
+		cdns,tsd2d-ns = <1>;
+		cdns,tchsh-ns = <1>;
+		cdns,tslch-ns = <1>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+};
+
 &sdio0 {
 	broken-cd;
 	bus-width = <4>;
@@ -393,6 +581,24 @@
 	};
 };
 
+&spi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_pins>;
+	status = "okay";
+
+	spi_dev0: spi@0 {
+		compatible = "rohm,dh2228fv";
+		spi-max-frequency = <10000000>;
+		reg = <0>;
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
 &uart3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart3_pins>;

diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
@@ -22,6 +22,19 @@
 	phy-handle = <&phy>;
 };
 
+&gpio {
+	/* don't reset gpio mux for serial console and reset gpio */
+	starfive,keep-gpiomux = <13 14 63>;
+};
+
+&i2c0 {
+	eeprom@50 {
+		compatible = "atmel,24c04";
+		reg = <0x50>;
+		pagesize = <16>;
+	};
+};
+
 /*
  * The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires
  * manual adjustment of the RX internal delay to work properly.  The default