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update fence interaction
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ved-rivos committed Jul 27, 2023
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4 changes: 2 additions & 2 deletions zacas.adoc
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Expand Up @@ -160,8 +160,8 @@ release semantics if `rl` bit is 1. The memory operation performed by an
`AMOCAS.W/D/Q`, when not successful, has acquire semantics if `aq` bit is 1 but
does not have release semantics, regardless of `rl`.

A FENCE instruction may be used to order the memory read and, if produced, the
memory write by an `AMOCAS.W/D/Q` instruction.
A FENCE instruction may be used to order the memory read access and, if
produced, the memory write access by an `AMOCAS.W/D/Q` instruction.

[NOTE]
====
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