Merge pull request #22 from ved-rivos/main

updating with public review feedback

header.adoc

@@ -1,8 +1,8 @@
 [[header]]
 :description: Hardware Updating of PTE A/D Bits (Svadu)
 :company: RISC-V.org
-:revdate: 8/2023
-:revnumber: 1.0-rc1
+:revdate: 9/2023
+:revnumber: 1.0-rc2
 :revremark: This document is in Frozen state. See http://riscv.org/spec-state for details.
 :url-riscv: http://riscv.org
 :doctype: book
@@ -59,6 +59,6 @@ Copyright 2022 by RISC-V International.
 === Contributors
 This RISC-V specification has been contributed (in alphabetical order) to directly or indirectly by:
 
-Aaron Durbin, Andrew Waterman, Earl Killian, Greg Favor, John Ingalls, Krste Asanović, Paul Donahue, Ved Shanbhogue
+Aaron Durbin, Andrew Waterman, Earl Killian, Greg Favor, John Ingalls, Ken Dockser, Krste Asanović, Paul Donahue, Ved Shanbhogue
 [preface]
 include::svadu.adoc[]