Re-enable non-inlined format args (#1362)

Fixes #1360

Cargo.toml

@@ -47,4 +47,4 @@ codegen-units = 256
 
 [profile.release-with-debug]
 inherits = "release"
-debug = true
+debug = true

airgen/Cargo.toml

@@ -13,3 +13,6 @@ powdr-number = { path = "../number" }
 powdr-analysis = { path = "../analysis" }
 
 log = "0.4.17"
+
+[lints.clippy]
+uninlined_format_args = "deny"

analysis/Cargo.toml

@@ -25,3 +25,6 @@ env_logger = "0.10.0"
 
 [package.metadata.cargo-udeps.ignore]
 development = ["env_logger"]
+
+[lints.clippy]
+uninlined_format_args = "deny"

analysis/src/machine_check.rs

@@ -102,8 +102,7 @@ impl TypeChecker {
                                 if let Some(using_reg) = &using_reg {
                                     if using_reg.len() != lhs.len() {
                                         errors.push(format!(
-                                            "Mismatched number of registers for assignment {}",
-                                            statement_string
+                                            "Mismatched number of registers for assignment {statement_string}"
                                         ));
                                     }
                                 }
@@ -177,8 +176,7 @@ impl TypeChecker {
             let operation_count = callable.operation_definitions().count();
             if operation_count > 0 && latch.is_none() {
                 errors.push(format!(
-                    "Machine {} should have a latch column as it does not have a pc and has operations",
-                    ctx
+                    "Machine {ctx} should have a latch column as it does not have a pc and has operations"
                 ));
             }
 
@@ -195,8 +193,7 @@ impl TypeChecker {
                 // no operation id column
                 if operation_count > 1 {
                     errors.push(format!(
-                        "Machine {} should have an operation id column as it does not have a pc and has more than one operation",
-                        ctx
+                        "Machine {ctx} should have an operation id column as it does not have a pc and has more than one operation"
                     ));
                 }
                 if let Some(o) = callable.operation_definitions().next() {
@@ -232,20 +229,17 @@ impl TypeChecker {
         } else {
             if latch.is_some() {
                 errors.push(format!(
-                    "Machine {} should not have a latch column as it has a pc",
-                    ctx
+                    "Machine {ctx} should not have a latch column as it has a pc"
                 ));
             }
             if operation_id.is_some() {
                 errors.push(format!(
-                    "Machine {} should not have an operation id column as it has a pc",
-                    ctx
+                    "Machine {ctx} should not have an operation id column as it has a pc"
                 ));
             }
             if call_selectors.is_some() {
                 errors.push(format!(
-                    "Machine {} should not have call_selectors as it has a pc",
-                    ctx
+                    "Machine {ctx} should not have call_selectors as it has a pc"
                 ));
             }
             for l in &links {
@@ -263,7 +257,7 @@ impl TypeChecker {
         }
 
         if registers.iter().filter(|r| r.ty.is_pc()).count() > 1 {
-            errors.push(format!("Machine {} cannot have more than one pc", ctx));
+            errors.push(format!("Machine {ctx} cannot have more than one pc"));
         }
 
         let machine = Machine {

analysis/src/vm/inference.rs

@@ -50,7 +50,7 @@ fn infer_machine(mut machine: Machine) -> Result<Machine, Vec<String>> {
                             .instructions
                             .iter()
                             .find(|i| i.name == *instr_name)
-                            .unwrap_or_else(|| panic!("invalid instruction: {}", instr_name));
+                            .unwrap_or_else(|| panic!("invalid instruction: {instr_name}"));
 
                         def.instruction
                             .params

asm-to-pil/Cargo.toml

@@ -19,3 +19,6 @@ pretty_assertions = "1.4.0"
 [dev-dependencies]
 powdr-analysis = { path = "../analysis" }
 powdr-importer = { path = "../importer" }
+
+[lints.clippy]
+uninlined_format_args = "deny"

asm-to-pil/src/common.rs

@@ -17,12 +17,12 @@ fn output_registers(count: usize) -> Vec<String> {
 
 /// The name of the read-only registers at index `i`
 pub fn input_at(i: usize) -> String {
-    format!("_input_{}", i)
+    format!("_input_{i}")
 }
 
 /// The name of the output assignment registers at index `i`
 pub fn output_at(i: usize) -> String {
-    format!("_output_{}", i)
+    format!("_output_{i}")
 }
 
 /// The return instruction for `output_count` outputs and `pc_name` the name of the pc

asm-to-pil/src/romgen.rs

@@ -181,7 +181,7 @@ pub fn generate_machine_rom<T: FieldElement>(mut machine: Machine) -> (Machine,
                 .first_mut()
                 .expect("function should have at least one statement as it must return")
                 .statements
-                .insert(0, parse_function_statement(&format!("_{}:", name)));
+                .insert(0, parse_function_statement(&format!("_{name}:")));
 
             // modify the last batch to be caused by the coming label
             let last = batches

asm-to-pil/src/vm_to_constrained.rs

@@ -132,7 +132,7 @@ impl<T: FieldElement> VMConverter<T> {
                             Pc => {
                                 // introduce an intermediate witness polynomial to keep the degree of polynomial identities at 2
                                 // this may not be optimal for backends which support higher degree constraints
-                                let pc_update_name = format!("{}_update", name);
+                                let pc_update_name = format!("{name}_update");
 
                                 vec![
                                     PilStatement::PolynomialDefinition(
@@ -364,7 +364,7 @@ impl<T: FieldElement> VMConverter<T> {
                     Input::Literal(param.name, LiteralKind::UnsignedConstant)
                 }
                 None => Input::Register(param.name),
-                Some(ty) => panic!("Invalid param type {}", ty),
+                Some(ty) => panic!("Invalid param type {ty}"),
             })
             .collect();
 
@@ -406,7 +406,7 @@ impl<T: FieldElement> VMConverter<T> {
                         );
                     }
                 }
-                Some(ty) => panic!("Invalid param type '{}'", ty),
+                Some(ty) => panic!("Invalid param type '{ty}'"),
             }
         }
 
@@ -556,8 +556,7 @@ impl<T: FieldElement> VMConverter<T> {
             for name in &rhs_assignment_registers {
                 assert!(
                     lhs.inputs_and_outputs().any(|p_lhs| p_lhs.name == *name),
-                    "Assignment register '{}' used on rhs must be present on lhs params",
-                    name
+                    "Assignment register '{name}' used on rhs must be present on lhs params"
                 );
             }
 
@@ -645,8 +644,7 @@ impl<T: FieldElement> VMConverter<T> {
         assert_eq!(
             instr.inputs.len() + instr.outputs.len(),
             args.len(),
-            "Called instruction {} with the wrong number of arguments",
-            instr_name
+            "Called instruction {instr_name} with the wrong number of arguments"
         );
 
         let mut args = args.into_iter();
@@ -679,7 +677,7 @@ impl<T: FieldElement> VMConverter<T> {
                                     T::from(n),
                                 ));
                             } else {
-                                panic!("expected unsigned number, received {}", a);
+                                panic!("expected unsigned number, received {a}");
                             }
                         }
                         Input::Literal(_, LiteralKind::SignedConstant) => {
@@ -1103,7 +1101,7 @@ impl<T: FieldElement> VMConverter<T> {
                         if counter == 0 {
                             "".to_string()
                         } else {
-                            format!("_{}", counter)
+                            format!("_{counter}")
                         }
                     );
                     self.pil.push(PilStatement::PolynomialDefinition(

asm-utils/Cargo.toml

@@ -9,3 +9,6 @@ repository = { workspace = true }
 
 [dependencies]
 itertools = "^0.10"
+
+[lints.clippy]
+uninlined_format_args = "deny"

asm-utils/src/ast.rs

@@ -164,7 +164,7 @@ impl<F: FunctionOpKind> Display for Expression<F> {
         match self {
             Expression::Number(n) => write!(f, "{n}"),
             Expression::Symbol(sym) => write!(f, "{sym}"),
-            Expression::UnaryOp(kind, expr) => write!(f, "({}{})", kind, expr),
+            Expression::UnaryOp(kind, expr) => write!(f, "({kind}{expr})"),
             Expression::BinaryOp(op, args) => {
                 let symbol = match op {
                     BinaryOpKind::Or => "|",
@@ -180,7 +180,7 @@ impl<F: FunctionOpKind> Display for Expression<F> {
                 };
                 write!(f, "({} {symbol} {})", args[0], args[1])
             }
-            Expression::FunctionOp(kind, expr) => write!(f, "{}({})", kind, expr),
+            Expression::FunctionOp(kind, expr) => write!(f, "{kind}({expr})"),
         }
     }
 }

ast/Cargo.toml

@@ -21,3 +21,5 @@ auto_enums = "0.8.5"
 [dev-dependencies]
 pretty_assertions = "1.4.0"
 
+[lints.clippy]
+uninlined_format_args = "deny"

ast/src/analyzed/mod.rs

@@ -322,11 +322,11 @@ impl<T: FieldElement> Analyzed<T> {
     }
 
     pub fn serialize(&self) -> Result<Vec<u8>, String> {
-        serde_cbor::to_vec(self).map_err(|e| format!("Failed to serialize analyzed: {}", e))
+        serde_cbor::to_vec(self).map_err(|e| format!("Failed to serialize analyzed: {e}"))
     }
 
     pub fn deserialize(bytes: &[u8]) -> Result<Self, String> {
-        serde_cbor::from_slice(bytes).map_err(|e| format!("Failed to deserialize analyzed: {}", e))
+        serde_cbor::from_slice(bytes).map_err(|e| format!("Failed to deserialize analyzed: {e}"))
     }
 }
 

ast/src/asm_analysis/display.rs

@@ -290,7 +290,7 @@ impl Display for FunctionBody {
 
 impl Display for Incompatible {
     fn fmt(&self, f: &mut Formatter<'_>) -> Result {
-        write!(f, "{:?}", self)
+        write!(f, "{self:?}")
     }
 }
 

ast/src/object/display.rs

@@ -30,7 +30,7 @@ impl Display for PILGraph {
             }
         }
         for (location, object) in &self.objects {
-            writeln!(f, "// Object {}", location)?;
+            writeln!(f, "// Object {location}")?;
             writeln!(f, "{object}")?;
             writeln!(f)?;
         }
@@ -41,7 +41,7 @@ impl Display for PILGraph {
 impl Display for Object {
     fn fmt(&self, f: &mut Formatter<'_>) -> Result {
         if let Some(degree) = self.degree.as_ref() {
-            writeln!(f, "// Degree {}", degree)?;
+            writeln!(f, "// Degree {degree}")?;
         }
         for s in &self.pil {
             writeln!(f, "{s}")?;

ast/src/parsed/display.rs

@@ -157,7 +157,7 @@ fn format_instruction_statement(stmt: &PilStatement) -> String {
             assert_eq!(s.pop(), Some(';'));
             s
         }
-        _ => panic!("invalid statement inside instruction body: {}", stmt),
+        _ => panic!("invalid statement inside instruction body: {stmt}"),
     }
 }
 
@@ -204,7 +204,7 @@ impl Display for MachineStatement {
                     .unwrap_or_default()
             ),
             MachineStatement::InstructionDeclaration(_, name, instruction) => {
-                write!(f, "instr {}{}", name, instruction)
+                write!(f, "instr {name}{instruction}")
             }
             MachineStatement::LinkDeclaration(_, link) => {
                 write!(f, "{link}")
@@ -411,7 +411,7 @@ impl Display for Param {
                 .unwrap_or_default(),
             self.ty
                 .as_ref()
-                .map(|ty| format!(": {}", ty))
+                .map(|ty| format!(": {ty}"))
                 .unwrap_or_default()
         )
     }
@@ -595,7 +595,7 @@ impl<Ref: Display> Display for Expression<Ref> {
             Expression::Number(value, _) => write!(f, "{value}"),
             Expression::String(value) => write!(f, "{}", quote(value)),
             Expression::Tuple(items) => write!(f, "({})", format_list(items)),
-            Expression::LambdaExpression(lambda) => write!(f, "{}", lambda),
+            Expression::LambdaExpression(lambda) => write!(f, "{lambda}"),
             Expression::ArrayLiteral(array) => write!(f, "{array}"),
             Expression::BinaryOperation(left, op, right) => write!(f, "({left} {op} {right})"),
             Expression::UnaryOperation(op, exp) => {

backend/Cargo.toml

@@ -49,3 +49,6 @@ pretty_assertions = "1.4.0"
 
 [package.metadata.cargo-udeps.ignore]
 development = ["env_logger"]
+
+[lints.clippy]
+uninlined_format_args = "deny"

backend/src/halo2/circuit_builder.rs

@@ -181,7 +181,7 @@ impl<'a, T: FieldElement, F: PrimeField<Repr = [u8; 32]>> Circuit<F> for PowdrCi
                     0 => meta.advice_column_in(FirstPhase),
                     1 => meta.advice_column_in(SecondPhase),
                     2 => meta.advice_column_in(ThirdPhase),
-                    _ => panic!("Stage too large for Halo2 backend: {}", stage),
+                    _ => panic!("Stage too large for Halo2 backend: {stage}"),
                 };
                 (name.clone(), col)
             })

cli/Cargo.toml

@@ -37,3 +37,6 @@ env_logger = "0.10.0"
 [[bin]]
 name = "powdr"
 path = "src/main.rs"
+
+[lints.clippy]
+uninlined_format_args = "deny"

cli/src/main.rs

@@ -774,7 +774,7 @@ fn run_command(command: Commands) {
     };
     if let Err(errors) = result {
         for error in errors {
-            eprintln!("{}", error);
+            eprintln!("{error}");
         }
         std::process::exit(1);
     }

executor/Cargo.toml

@@ -28,3 +28,6 @@ pretty_assertions = "1.4.0"
 
 [package.metadata.cargo-udeps.ignore]
 development = ["env_logger"]
+
+[lints.clippy]
+uninlined_format_args = "deny"

executor/src/constant_evaluator/mod.rs

@@ -64,7 +64,7 @@ fn generate_values<T: FieldElement>(
                     assert!(index.is_some());
                     assert_eq!(base.as_ref(), &Type::Col);
                 } else {
-                    panic!("Invalid fixed column type: {}", ty);
+                    panic!("Invalid fixed column type: {ty}");
                 }
             };
             let index_expr;

executor/src/witgen/data_structures/finalizable_data.rs

@@ -75,7 +75,7 @@ impl<'a, T: FieldElement> FinalizableData<'a, T> {
     pub fn remove(&mut self, i: usize) -> Row<'a, T> {
         match self.data.remove(i) {
             Entry::InProgress(row) => row,
-            Entry::Finalized(_, _) => panic!("Row {} already finalized.", i),
+            Entry::Finalized(_, _) => panic!("Row {i} already finalized."),
         }
     }
 
@@ -86,7 +86,7 @@ impl<'a, T: FieldElement> FinalizableData<'a, T> {
     pub fn get_mut(&mut self, i: usize) -> Option<&mut Row<'a, T>> {
         match &mut self.data[i] {
             Entry::InProgress(row) => Some(row),
-            Entry::Finalized(_, _) => panic!("Row {} already finalized.", i),
+            Entry::Finalized(_, _) => panic!("Row {i} already finalized."),
         }
     }
 
@@ -183,7 +183,7 @@ impl<'a, T: FieldElement> Index<usize> for FinalizableData<'a, T> {
     fn index(&self, index: usize) -> &Self::Output {
         match &self.data[index] {
             Entry::InProgress(row) => row,
-            Entry::Finalized(_, _) => panic!("Row {} already finalized.", index),
+            Entry::Finalized(_, _) => panic!("Row {index} already finalized."),
         }
     }
 }
@@ -192,7 +192,7 @@ impl<'a, T: FieldElement> IndexMut<usize> for FinalizableData<'a, T> {
     fn index_mut(&mut self, index: usize) -> &mut Self::Output {
         match &mut self.data[index] {
             Entry::InProgress(row) => row,
-            Entry::Finalized(_, _) => panic!("Row {} already finalized.", index),
+            Entry::Finalized(_, _) => panic!("Row {index} already finalized."),
         }
     }
 }

executor/src/witgen/eval_result.rs

@@ -224,7 +224,7 @@ impl<T: FieldElement> fmt::Display for EvalError<T> {
             EvalError::FixedLookupFailed(input_assignment) => {
                 let query = input_assignment
                     .iter()
-                    .map(|(poly_name, v)| format!("{} = {}", poly_name, v))
+                    .map(|(poly_name, v)| format!("{poly_name} = {v}"))
                     .collect::<Vec<_>>()
                     .join(", ");
                 write!(