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A CPU made with Verilog code and schematic files using Quartus II, with RISC architecture and Pipe line data path

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mbehnasr/ComputerArchitectureProject-CPU

 
 

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ComputerArchitectureProject-CPU

A CPU made with Verilog code and schematic files using Quartus II, with RISC architecture and Pipe line data path

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A CPU made with Verilog code and schematic files using Quartus II, with RISC architecture and Pipe line data path

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  • Verilog 90.8%
  • HTML 8.7%
  • Other 0.5%