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Automatic merge of 'fixes-test' into merge-test (2023-10-19 23:30)
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mpe committed Oct 19, 2023
2 parents 4c0a3b1 + a22423e commit 1635a0c
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Showing 3 changed files with 6 additions and 11 deletions.
3 changes: 3 additions & 0 deletions arch/powerpc/lib/qspinlock.c
Original file line number Diff line number Diff line change
Expand Up @@ -406,6 +406,9 @@ static __always_inline bool yield_to_prev(struct qspinlock *lock, struct qnode *
if ((yield_count & 1) == 0)
goto yield_prev; /* owner vcpu is running */

if (get_owner_cpu(READ_ONCE(lock->val)) != yield_cpu)
goto yield_prev; /* re-sample lock owner */

spin_end();

preempted = true;
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9 changes: 1 addition & 8 deletions arch/powerpc/mm/book3s64/radix_tlb.c
Original file line number Diff line number Diff line change
Expand Up @@ -1212,14 +1212,7 @@ void radix__tlb_flush(struct mmu_gather *tlb)

smp_mb(); /* see radix__flush_tlb_mm */
exit_flush_lazy_tlbs(mm);
_tlbiel_pid(mm->context.id, RIC_FLUSH_ALL);

/*
* It should not be possible to have coprocessors still
* attached here.
*/
if (WARN_ON_ONCE(atomic_read(&mm->context.copros) > 0))
__flush_all_mm(mm, true);
__flush_all_mm(mm, true);

preempt_enable();
} else {
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5 changes: 2 additions & 3 deletions arch/powerpc/perf/core-book3s.c
Original file line number Diff line number Diff line change
Expand Up @@ -1371,8 +1371,7 @@ static void power_pmu_disable(struct pmu *pmu)
/*
* Disable instruction sampling if it was enabled
*/
if (cpuhw->mmcr.mmcra & MMCRA_SAMPLE_ENABLE)
val &= ~MMCRA_SAMPLE_ENABLE;
val &= ~MMCRA_SAMPLE_ENABLE;

/* Disable BHRB via mmcra (BHRBRD) for p10 */
if (ppmu->flags & PPMU_ARCH_31)
Expand All @@ -1383,7 +1382,7 @@ static void power_pmu_disable(struct pmu *pmu)
* instruction sampling or BHRB.
*/
if (val != mmcra) {
mtspr(SPRN_MMCRA, mmcra);
mtspr(SPRN_MMCRA, val);
mb();
isync();
}
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