Xilinx v2023.01 rebase

arch/arm/dts/Makefile

@@ -471,6 +471,7 @@ dtb-$(CONFIG_ARCH_VERSAL_NET) += \
 	versal-net-ipp-rev1.9.dtb \
 	versal-net-ipp-rev1.9-ospi.dtb \
 	versal-net-vn-p-b2197-00-revA.dtb \
+	versal-net-vn-x-b2197-00-revA.dtb \
 	x-prc-07-revA.dtbo \
 	x-prc-07-i3c-revA.dtbo \
 	x-prc-08-revA.dtbo \
@@ -479,7 +480,14 @@ dtb-$(CONFIG_ARCH_VERSAL_NET) += \
 	versal-net-mini.dtb \
 	versal-net-mini-emmc.dtb \
 	versal-net-mini-ospi-single.dtb \
+	versal-net-mini-ospi-stacked.dtb \
+	versal-net-mini-qspi-parallel.dtb \
 	versal-net-mini-qspi-single.dtb \
+	versal-net-mini-qspi-stacked.dtb \
+	versal-net-mini-qspi-x1-single.dtb \
+	versal-net-mini-qspi-x1-stacked.dtb \
+	versal-net-mini-qspi-x2-single.dtb \
+	versal-net-mini-qspi-x2-stacked.dtb \
 	xilinx-versal-net-virt.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
 	zynqmp-r5.dtb

arch/arm/dts/versal-mini-ospi.dtsi

@@ -57,6 +57,7 @@
 				spi-tx-bus-width = <8>;
 				spi-rx-bus-width = <8>;
 				spi-max-frequency = <20000000>;
+				no-wp;
 			};
 		};
 	};

arch/arm/dts/versal-net-clk-ccf.dtsi

@@ -121,7 +121,7 @@
 		};
 	};
 
-	zynqmp_ipi {
+	zynqmp-ipi {
 		compatible = "xlnx,zynqmp-ipi-mailbox";
 		interrupt-parent = <&gic>;
 		interrupts = <0 57 4>;
@@ -407,3 +407,13 @@
 	clocks = <&versal_net_clk FPD_WWDT>;
 	power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_3>;
 };
+
+&lpd_wwdt0 {
+	clocks = <&versal_net_clk LPD_WWDT>;
+	power-domains = <&versal_net_firmware PM_DEV_LPD_SWDT_0>;
+};
+
+&lpd_wwdt1 {
+	clocks = <&versal_net_clk LPD_WWDT>;
+	power-domains = <&versal_net_firmware PM_DEV_LPD_SWDT_1>;
+};

arch/arm/dts/versal-net-clk.dtsi

@@ -231,3 +231,11 @@
 &wwdt3 {
 	clocks = <&clk150>;
 };
+
+&lpd_wwdt0 {
+	clocks = <&clk150>;
+};
+
+&lpd_wwdt1 {
+	clocks = <&clk150>;
+};

arch/arm/dts/versal-net-ipp-rev1.9.dts

@@ -169,7 +169,7 @@
 		};
 	};
 
-	zynqmp_ipi {
+	zynqmp-ipi {
 		compatible = "xlnx,zynqmp-ipi-mailbox";
 		interrupts = <0 57 4>;
 		xlnx,ipi-id = <2>;
@@ -477,6 +477,7 @@
 				spi-rx-bus-width = <8>;
 				spi-max-frequency = <5000000>;
 				broken-flash-reset;
+				no-wp;
 
 				partitions {
 					compatible = "fixed-partitions";
@@ -733,49 +734,37 @@
 		};
 
 		wwdt0: watchdog@ecc10000 {
-			compatible = "xlnx,versal-wwdt-1.0";
+			compatible = "xlnx,versal-wwdt";
 			status = "okay";
 			reg = <0 0xecc10000 0 0x10000>;
-			interrupt-names = "wdt", "wwdt_reset_pending";
-			interrupts = <0 139 1>, <0 140 1>;
 			timeout-sec = <30>;
-			pretimeout-sec = <25>;
 			clocks = <&versal_net_clk FPD_WWDT>;
 			power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_0>;
 		};
 
 		wwdt1: watchdog@ecd10000 {
-			compatible = "xlnx,versal-wwdt-1.0";
+			compatible = "xlnx,versal-wwdt";
 			status = "okay";
 			reg = <0 0xecd10000 0 0x10000>;
-			interrupt-names = "wdt", "wwdt_reset_pending";
-			interrupts = <0 143 1>, <0 144 1>;
 			timeout-sec = <30>;
-			pretimeout-sec = <25>;
 			clocks = <&versal_net_clk FPD_WWDT>;
 			power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_1>;
 		};
 
 		wwdt2: watchdog@ece10000 {
-			compatible = "xlnx,versal-wwdt-1.0";
+			compatible = "xlnx,versal-wwdt";
 			status = "okay";
 			reg = <0 0xece10000 0 0x10000>;
-			interrupt-names = "wdt", "wwdt_reset_pending";
-			interrupts = <0 147 1>,  <0 148 1>;
 			timeout-sec = <30>;
-			pretimeout-sec = <25>;
 			clocks = <&versal_net_clk FPD_WWDT>;
 			power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_2>;
 		};
 
 		wwdt3: watchdog@ecf10000 {
-			compatible = "xlnx,versal-wwdt-1.0";
+			compatible = "xlnx,versal-wwdt";
 			status = "okay";
 			reg = <0 0xecf10000 0 0x10000>;
-			interrupt-names = "wdt", "wwdt_reset_pending";
-			interrupts = <0 164 1>, <0 165 1>;
 			timeout-sec = <30>;
-			pretimeout-sec = <25>;
 			clocks = <&versal_net_clk FPD_WWDT>;
 			power-domains = <&versal_net_firmware PM_DEV_FPD_SWDT_3>;
 		};

arch/arm/dts/versal-net-mini-ospi-stacked.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET OSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-ospi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI OSPI STACKED";
+};
+
+&flash0 {
+	reg = <0>, <1>;
+	stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+	spi-rx-bus-width = <8>;
+};

arch/arm/dts/versal-net-mini-ospi.dtsi

@@ -72,6 +72,7 @@
 				spi-tx-bus-width = <8>;
 				spi-rx-bus-width = <8>;
 				spi-max-frequency = <20000000>;
+				no-wp;
 			};
 		};
 	};

arch/arm/dts/versal-net-mini-qspi-parallel.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Parallel DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI PARALLEL";
+};
+
+&flash0 {
+	reg = <0>, <1>;
+	parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+	spi-rx-bus-width = <4>;
+};

arch/arm/dts/versal-net-mini-qspi-stacked.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI STACKED";
+};
+
+&flash0 {
+	reg = <0>, <1>;
+	stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+	spi-rx-bus-width = <4>;
+};

arch/arm/dts/versal-net-mini-qspi-x1-single.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI X1 SINGLE";
+};
+
+&flash0 {
+	spi-tx-bus-width = <1>;
+	spi-rx-bus-width = <1>;
+};

arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI X1 STACKED";
+};
+
+&flash0 {
+	reg = <0>, <1>;
+	stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+	spi-tx-bus-width = <1>;
+	spi-rx-bus-width = <1>;
+};

arch/arm/dts/versal-net-mini-qspi-x2-single.dts

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI X2 SINGLE";
+};
+
+&flash0 {
+	spi-tx-bus-width = <2>;
+	spi-rx-bus-width = <2>;
+};

arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+	model = "Xilinx Versal NET MINI QSPI X2 STACKED";
+};
+
+&flash0 {
+	reg = <0>, <1>;
+	stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+	spi-tx-bus-width = <2>;
+	spi-rx-bus-width = <2>;
+};