+add Parameter yuvType in functions Simd::Yuv420pToBgr, Simd::Yuv422p…

…ToBgr, Simd::Yuv444pToBgr; The mark of functions SimdYuv420pToBgr, SimdYuv422pToBgr, SimdYuv444pToBgr as deprecated; Base implementation, SSE4.1, AVX2 optimizations of function Yuv422pToBgraV2.
ermig1979 · Aug 8, 2023 · f2ac83f · f2ac83f
1 parent f6989cd
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diff --git a/docs/2023.html b/docs/2023.html
@@ -40,6 +40,13 @@ <h5>New features</h5>
  <li>Base implementation, SSE4.1, AVX2, AVX-512BW, NEON optimizations of function Yuv420pToBgrV2.</li>
  <li>Base implementation, SSE4.1, AVX2, AVX-512BW, NEON optimizations of function Yuv422pToBgrV2.</li>
  <li>Base implementation, SSE4.1, AVX2, AVX-512BW, NEON optimizations of function Yuv444pToBgrV2.</li>
+ <li>Parameter yuvType in function Simd::Yuv420pToBgr.</li>
+ <li>Parameter yuvType in function Simd::Yuv422pToBgr.</li>
+ <li>Parameter yuvType in function Simd::Yuv444pToBgr.</li>
+ <li>The mark of function SimdYuv420pToBgr as deprecated.</li>
+ <li>The mark of function SimdYuv422pToBgr as deprecated.</li>
+ <li>The mark of function SimdYuv444pToBgr as deprecated.</li>
+ <li>Base implementation, SSE4.1, AVX2 optimizations of function Yuv422pToBgraV2.</li>
 </ul>
 
 <h4>Test framework</h4>
@@ -48,6 +55,7 @@ <h5>New features</h5>
  <li>Tests for verifying functionality of function Yuv420pToBgrV2.</li>
  <li>Tests for verifying functionality of function Yuv422pToBgrV2.</li>
  <li>Tests for verifying functionality of function Yuv444pToBgrV2.</li>
+ <li>Tests for verifying functionality of function Yuv422pToBgraV2.</li>
 </ul>
 
 <a href="#HOME">Home</a>

diff --git a/docs/help/group__yuv__conversion.html b/docs/help/group__yuv__conversion.html
diff --git a/docs/help/namespace_simd.html b/docs/help/namespace_simd.html
diff --git a/docs/help/namespacemembers_func_y.html b/docs/help/namespacemembers_func_y.html
diff --git a/docs/help/namespacemembers_y.html b/docs/help/namespacemembers_y.html
diff --git a/prj/vs2019/Avx2.vcxproj b/prj/vs2019/Avx2.vcxproj
@@ -126,6 +126,7 @@
     <ClCompile Include="..\..\src\Simd\SimdAvx2WarpAffine.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgr.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgra.cpp" />
+    <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgraV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgrV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToHue.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToUyvy.cpp" />

diff --git a/prj/vs2019/Avx2.vcxproj.filters b/prj/vs2019/Avx2.vcxproj.filters
@@ -358,6 +358,9 @@
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgrV2.cpp">
       <Filter>Avx2</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgraV2.cpp">
+      <Filter>Avx2</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <Filter Include="Avx2">

diff --git a/prj/vs2019/Sse41.vcxproj b/prj/vs2019/Sse41.vcxproj
@@ -139,6 +139,7 @@
     <ClCompile Include="..\..\src\Simd\SimdSse41Winograd3.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgr.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgra.cpp" />
+    <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgraV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgrV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToHue.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToUyvy.cpp" />

diff --git a/prj/vs2019/Sse41.vcxproj.filters b/prj/vs2019/Sse41.vcxproj.filters
@@ -397,6 +397,9 @@
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgrV2.cpp">
       <Filter>Sse41</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgraV2.cpp">
+      <Filter>Sse41</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <Filter Include="Sse41">

diff --git a/prj/vs2022/Avx2.vcxproj b/prj/vs2022/Avx2.vcxproj
@@ -126,6 +126,7 @@
     <ClCompile Include="..\..\src\Simd\SimdAvx2WarpAffine.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgr.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgra.cpp" />
+    <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgraV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgrV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToHue.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToUyvy.cpp" />

diff --git a/prj/vs2022/Avx2.vcxproj.filters b/prj/vs2022/Avx2.vcxproj.filters
@@ -358,6 +358,9 @@
     <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgrV2.cpp">
       <Filter>Avx2</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\src\Simd\SimdAvx2YuvToBgraV2.cpp">
+      <Filter>Avx2</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <Filter Include="Avx2">

diff --git a/prj/vs2022/Sse41.vcxproj b/prj/vs2022/Sse41.vcxproj
@@ -139,6 +139,7 @@
     <ClCompile Include="..\..\src\Simd\SimdSse41Winograd3.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgr.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgra.cpp" />
+    <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgraV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgrV2.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToHue.cpp" />
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToUyvy.cpp" />

diff --git a/prj/vs2022/Sse41.vcxproj.filters b/prj/vs2022/Sse41.vcxproj.filters
@@ -397,6 +397,9 @@
     <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgrV2.cpp">
       <Filter>Sse41</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\src\Simd\SimdSse41YuvToBgraV2.cpp">
+      <Filter>Sse41</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <Filter Include="Sse41">

diff --git a/src/Simd/SimdAvx2.h b/src/Simd/SimdAvx2.h
@@ -598,6 +598,9 @@ namespace Simd
         void Yuv422pToBgra(const uint8_t * y, size_t yStride, const uint8_t * u, size_t uStride, const uint8_t * v, size_t vStride,
             size_t width, size_t height, uint8_t * bgra, size_t bgraStride, uint8_t alpha);
 
+        void Yuv422pToBgraV2(const uint8_t* y, size_t yStride, const uint8_t* u, size_t uStride, const uint8_t* v, size_t vStride,
+            size_t width, size_t height, uint8_t* bgra, size_t bgraStride, uint8_t alpha, SimdYuvType yuvType);
+
         void Yuv444pToBgra(const uint8_t * y, size_t yStride, const uint8_t * u, size_t uStride, const uint8_t * v, size_t vStride,
             size_t width, size_t height, uint8_t * bgra, size_t bgraStride, uint8_t alpha);
 

diff --git a/src/Simd/SimdAvx2YuvToBgr.cpp b/src/Simd/SimdAvx2YuvToBgr.cpp
@@ -1,7 +1,7 @@
 /*
 * Simd Library (http://ermig1979.github.io/Simd).
 *
-* Copyright (c) 2011-2022 Yermalayeu Ihar.
+* Copyright (c) 2011-2023 Yermalayeu Ihar.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal

diff --git a/src/Simd/SimdAvx2YuvToBgrV2.cpp b/src/Simd/SimdAvx2YuvToBgrV2.cpp
@@ -1,7 +1,7 @@
 /*
 * Simd Library (http://ermig1979.github.io/Simd).
 *
-* Copyright (c) 2011-2022 Yermalayeu Ihar.
+* Copyright (c) 2011-2023 Yermalayeu Ihar.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal