rockchip64-edge: add rkvdec2 for rk356x

config/bootenv/rk356x.txt

@@ -0,0 +1,4 @@
+verbosity=1
+bootlogo=false
+console=both
+extraargs=cma=256M

config/kernel/linux-rockchip64-edge.config

@@ -7847,6 +7847,7 @@ CONFIG_STAGING_MEDIA=y
 # CONFIG_DVB_AV7110 is not set
 # CONFIG_VIDEO_MAX96712 is not set
 CONFIG_VIDEO_ROCKCHIP_VDEC=m
+CONFIG_VIDEO_ROCKCHIP_VDEC2=m
 
 #
 # StarFive media platform drivers

config/sources/families/include/rockchip64_common.inc

@@ -126,6 +126,7 @@ case "$BOOT_SOC" in
 		# ROCKUSB_BLOB is used to flash a board with rkdeveloptool (Linux, can use 'rkdevflash' extension) or RKDevTool (Windows) in MASKROM mode
 		ROCKUSB_BLOB="rk35/rk356x_spl_loader_v1.21.113.bin"
 		BOOT_SOC_MKIMAGE="rk3568" # mkimage does not know about rk3566, and rk3568 works.
+		BOOTENV_FILE='rk356x.txt'
 		;;
 
 	rk3568)
@@ -135,6 +136,7 @@ case "$BOOT_SOC" in
 		BL31_BLOB="${BL31_BLOB:-"rk35/rk3568_bl31_v1.44.elf"}"
 		# ROCKUSB_BLOB is used to flash a board with rkdeveloptool (Linux, can use 'rkdevflash' extension) or RKDevTool (Windows) in MASKROM mode
 		ROCKUSB_BLOB="rk35/rk356x_spl_loader_v1.21.113.bin"
+		BOOTENV_FILE='rk356x.txt'
 		;;
 
 	rk3576)

packages/bsp/common/etc/udev/rules.d/90-chromium-video.rules

@@ -4,9 +4,10 @@ SUBSYSTEM=="video4linux", ATTR{name}=="qcom-venus-decoder", SYMLINK+="video-dec%
 # This is qcom venus v4l2 stateful encoder, not tested yet, but chromium did query /dev/video-enc* devives for v4l2 encoding.
 SUBSYSTEM=="video4linux", ATTR{name}=="qcom-venus-encoder", SYMLINK+="video-enc%n"
 
-# These rules are for hantro v4l2 stateless decoders found on rk3399, rk3568 and rk3588
-SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3568-vpu-dec", SYMLINK+="video-dec%n"
+# These rules are for hantro v4l2 stateless decoders found on rk3328, rk3399, rk3568 and rk3588
+SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3328-vpu-dec", SYMLINK+="video-dec%n"
 SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3399-vpu-dec", SYMLINK+="video-dec%n"
+SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3568-vpu-dec", SYMLINK+="video-dec%n"
 # AV1 decoder on rk3588 is still not well supported, so disable it now
 #SUBSYSTEM=="video4linux", ATTR{name}=="rockchip,rk3588-av1-vpu-dec", SYMLINK+="video-dec%n"
 SUBSYSTEM=="media", ATTR{model}=="hantro-vpu", SYMLINK+="media-dec%n"

patch/kernel/archive/rockchip64-6.10/media-0001-Add-rkvdec2-Support-v3.patch

@@ -0,0 +1 @@
+../rockchip-rk3588-6.10/0027-RK3588-Add-rkvdec2-Support-v3.patch

patch/kernel/archive/rockchip64-6.10/media-0002-v4l2-core-Initialize-h264-frame_mbs_only_flag-.patch

@@ -0,0 +1 @@
+../rockchip-rk3588-6.10/0028-media-v4l2-core-Initialize-h264-frame_mbs_only_flag-.patch

patch/kernel/archive/rockchip64-6.10/media-0003-rk3568-disable-hantro-h264.patch

@@ -0,0 +1,63 @@
+diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
+index 34b123daf..802a5dca1 100644
+--- a/drivers/media/platform/verisilicon/hantro_drv.c
++++ b/drivers/media/platform/verisilicon/hantro_drv.c
+@@ -721,7 +721,6 @@ static const struct of_device_id of_hantro_match[] = {
+ 	{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
+ 	{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
+ 	{ .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
+-	{ .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
+ 	{ .compatible = "rockchip,rk3588-av1-vpu", .data = &rk3588_vpu981_variant, },
+ #endif
+ #ifdef CONFIG_VIDEO_HANTRO_IMX8M
+diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h
+index 7737320cc..5aa048ef3 100644
+--- a/drivers/media/platform/verisilicon/hantro_hw.h
++++ b/drivers/media/platform/verisilicon/hantro_hw.h
+@@ -404,7 +404,6 @@ extern const struct hantro_variant rk3288_vpu_variant;
+ extern const struct hantro_variant rk3328_vpu_variant;
+ extern const struct hantro_variant rk3399_vpu_variant;
+ extern const struct hantro_variant rk3568_vepu_variant;
+-extern const struct hantro_variant rk3568_vpu_variant;
+ extern const struct hantro_variant rk3588_vpu981_variant;
+ extern const struct hantro_variant sama5d4_vdec_variant;
+ extern const struct hantro_variant sunxi_vpu_variant;
+diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
+index f97527670..5707dce4b 100644
+--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
++++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
+@@ -719,10 +719,9 @@ const struct hantro_variant rk3288_vpu_variant = {
+
+ const struct hantro_variant rk3328_vpu_variant = {
+ 	.dec_offset = 0x400,
+-	.dec_fmts = rockchip_vdpu2_dec_fmts,
+-	.num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts),
+-	.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+-		 HANTRO_H264_DECODER,
++	.dec_fmts = rk3399_vpu_dec_fmts,
++	.num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
++	.codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER,
+ 	.codec_ops = rk3399_vpu_codec_ops,
+ 	.irqs = rockchip_vdpu2_irqs,
+ 	.num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
+@@ -766,20 +765,6 @@ const struct hantro_variant rk3568_vepu_variant = {
+ 	.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+ };
+
+-const struct hantro_variant rk3568_vpu_variant = {
+-	.dec_offset = 0x400,
+-	.dec_fmts = rockchip_vdpu2_dec_fmts,
+-	.num_dec_fmts = ARRAY_SIZE(rockchip_vdpu2_dec_fmts),
+-	.codec = HANTRO_MPEG2_DECODER |
+-		 HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
+-	.codec_ops = rk3399_vpu_codec_ops,
+-	.irqs = rockchip_vdpu2_irqs,
+-	.num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
+-	.init = rockchip_vpu_hw_init,
+-	.clk_names = rockchip_vpu_clk_names,
+-	.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
+-};
+-
+ const struct hantro_variant px30_vpu_variant = {
+ 	.enc_offset = 0x0,
+ 	.enc_fmts = rockchip_vpu_enc_fmts,

patch/kernel/archive/rockchip64-6.10/rk356x-add-rkvdec2-support.patch

@@ -0,0 +1,59 @@
+diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+index d8543b555..37141f416 100644
+--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+@@ -449,6 +449,19 @@ usb2phy1_grf: syscon@fdca8000 {
+ 		reg = <0x0 0xfdca8000 0x0 0x8000>;
+ 	};
+
++	sram@fdcc0000 {
++		compatible = "mmio-sram";
++		reg = <0x0 0xfdcc0000 0x0 0xb000>;
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges = <0x0 0x0 0xfdcc0000 0xb000>;
++
++		vdec_sram: rkvdec-sram@0 {
++			reg = <0x0 0xb000>;
++			pool;
++		};
++	};
++
+ 	pmucru: clock-controller@fdd00000 {
+ 		compatible = "rockchip,rk3568-pmucru";
+ 		reg = <0x0 0xfdd00000 0x0 0x1000>;
+@@ -635,7 +648,7 @@ gpu: gpu@fde60000 {
+ 	};
+
+ 	vpu: video-codec@fdea0400 {
+-		compatible = "rockchip,rk3568-vpu";
++		compatible = "rockchip,rk3328-vpu";
+ 		reg = <0x0 0xfdea0000 0x0 0x800>;
+ 		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupt-names = "vdpu";
+@@ -686,6 +699,25 @@ vepu_mmu: iommu@fdee0800 {
+ 		#iommu-cells = <0>;
+ 	};
+
++	vdec: video-codec@fdf80200 {
++		compatible = "rockchip,rk3588-vdec";
++		reg = <0x0 0xfdf80200 0x0 0x500>;
++		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH 0>;
++		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, <&cru CLK_RKVDEC_CA>,
++			 <&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>;
++		clock-names = "axi", "ahb", "cabac", "core", "hevc_cabac";
++		assigned-clocks = <&cru ACLK_RKVDEC>, <&cru CLK_RKVDEC_CORE>,
++				  <&cru CLK_RKVDEC_CA>, <&cru CLK_RKVDEC_HEVC_CA>;
++		assigned-clock-rates = <297000000>, <297000000>,
++				       <297000000>, <297000000>;
++		resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>, <&cru SRST_RKVDEC_CA>,
++			 <&cru SRST_RKVDEC_CORE>, <&cru SRST_RKVDEC_HEVC_CA>;
++		reset-names = "rst_axi", "rst_ahb", "rst_cabac",
++			      "rst_core", "rst_hevc_cabac";
++		power-domains = <&power RK3568_PD_RKVDEC>;
++		sram = <&vdec_sram>;
++	};
++
+ 	sdmmc2: mmc@fe000000 {
+ 		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
+ 		reg = <0x0 0xfe000000 0x0 0x4000>;