docs(tt_um_ssp_opamp): fix image sizes #281

projects/tt_um_ssp_opamp/docs/info.md

@@ -8,11 +8,9 @@ You can also include images in this folder and reference them in the markdown. E
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 ## How it works
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 This project contains in total 3 circuits: 2 nos. of 2-stage opamp and 1 POR (Power on reset) circuit. These circuits are  designed by participants of analog IC design training conducted by SSP (Saudi Semiconductor Program). 
 
 ### 2-stage Opamp
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 A 2-stage Miller operational amplifier (op-amp) circuit comprises two amplification stages, with a Miller capacitor connected between the output of the first stage and the input of the second stage. This arrangement improves stability and bandwidth, making it ideal for high-gain, high-frequency applications. The 2-stage Miller op-amp is frequently utilized in precision analog signal processing, active filters, and high-impedance buffer circuits.
 
 **First Stage:** An NMOS differential input pair, selected for its high transconductance and speed, amplifies the difference between the input signals.
@@ -25,34 +23,36 @@ In the op-amp design submissions, **Amr Abdelrahman** and **Majid Sami** each pr
 
 #### (1) Design by Amr Abdelrahman
 
-![Opamp Schematic](pic_opamp_sch.png)
-![Opamp Testbench](pic_opamp_testbench.png)
-![Opamp Layout](pic_opamp_layout.png)
-![Opamp Simulation Specifications](pic_opamp_Specs.png)
+<img src="pic_opamp_sch.png" alt="Opamp Schematic" width="600" height="400">
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+<img src="pic_opamp_testbench.png" alt="Opamp Testbench" width="600" height="400">
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+<img src="pic_opamp_layout.png" alt="Opamp Layout" width="600" height="400">
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+<img src="pic_opamp_Specs.png" alt="Opamp Simulation Specifications" width="400" height="200">
 
 #### (2) Design by Majid Sami
 
-![Opamp Schematic](pic1_opamp_sch.png)
-![Opamp Testbench](pic1_opamp_testbench.png)
-![Opamp Layout](pic1_opamp_layout.png)
-![Opamp Simulation Specifications](pic1_opamp_specs.png)
+<img src="pic1_opamp_sch.png" alt="Opamp Schematic" width="600" height="400">
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+<img src="pic1_opamp_testbench.png" alt="Opamp Testbench" width="600" height="500">
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+<img src="pic1_opamp_layout.png" alt="Opamp Layout" width="600" height="400">
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+<img src="pic1_opamp_specs.png" alt="Opamp Simulation Specifications" width="400" height="200">
+
 
 ### POR (Power On Reset) Circuit
 Power-on reset (POR) circuit ensures that electronic systems start up in a known, stable state by generating a reset signal when power is initially applied. This circuit detects when the power supply reaches a sufficient voltage level and holds the reset line active until the voltage stabilizes, preventing erratic behavior and data corruption. POR circuits are crucial in microcontrollers, consumer electronics, and industrial systems, as they guarantee reliable initialization and consistent performance, thereby enhancing system stability and functionality during power-up.The circuit designed without capacitor which yields 30% reduction of chip’s area compared to the conventional designs
 
 #### (1) Design by Khalid Alorayir
-![POR Schematic](pic_por_sch.png)
-![POR Testbench](pic_por_testbench.png)
-![POR Layout](pic_por_lay.png)
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-
+<img src="pic_por_sch.png" alt="POR Schematic" width="600" height="400">
+<img src="pic_por_testbench.png" alt="POR Testbench" width="600" height="400">
+<img src="pic_por_lay.png" alt="POR Layout" width="600" height="400">
 
 ## How to test
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 ### (1) Testing Opamp Circuit
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 #### Non-Inverting Configuration
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 1. **Set Up the Circuit:** Connect the op-amp with the input signal to the non-inverting input (+) and a feedback resistor network to the inverting input (−).
 2. **Power the Op-Amp:** Apply the required positive and negative supply voltages.
 3. **Apply Input Signal:** Feed a known input signal to the non-inverting input.
@@ -61,39 +61,27 @@ Power-on reset (POR) circuit ensures that electronic systems start up in a known
 6. **Evaluate Stability and Linearity:** Look for any oscillations or instability and confirm the output accurately represents the input signal.
 
 #### Buffer (Voltage Follower) Configuration
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 1. **Set Up the Circuit:** Connect the op-amp with output to the inverting input (−) and the input signal to the non-inverting input (+).
 2. **Power the Op-Amp:** Apply the necessary supply voltages.
 3. **Apply Input Signal:** Feed a known input signal to the non-inverting input.
 4. **Measure Output:** Use an oscilloscope or multimeter to measure the output voltage and ensure it closely follows the input with minimal offset.
 5. **Check Frequency Response and Stability:** Confirm fidelity of output across different frequencies and ensure stable output without oscillations.
 6. **Assess Load Driving Capability:** Test with various loads to verify effective driving.
 
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 ### (2) Testing POR Circuit
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 1. Power up the circuit such that VDD voltage reaches final 1.8V value from 0V in 1us to 10us seep time.
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 2. Check the reset signal with an oscilloscope to confirm proper activation and deactivation.
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 3. Verify that the voltage reaches the threshold and that the reset signal duration is sufficient, especially for rise times of 1µs to 10µs.
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 4. Test the POR circuit under varying power conditions and ensure correct system initialization post-reset.
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 5. Power down and repeat the test to ensure consistent performance.
 
 ## External hardware
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 Digilent Analog Discovery can be used for various measurements of opamp circuits. 
 
 1. **Signal Generation**: Use the Analog Discovery's waveform generator to create test signals for the op-amp and power-on-reset circuits.
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 2. **Measurement**: Connect the oscilloscope probes to monitor the input and output signals of the op-amp and observe the behavior of the power-on-reset circuit.
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 3. **Frequency Response**: Analyze the frequency response of the op-amp by sweeping through various frequencies and recording the output using the Analog Discovery's built-in tools.
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 4. **Transient Analysis**: Measure how the op-amp and power-on-reset circuits respond to transient signals or sudden changes, such as power-up events.
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 5. **Voltage Levels**: Check the stability and correct operation of the power-on-reset circuit by measuring the voltage levels and timing of the reset pulse.
 
-![Sample Measurement Setup using Analog Discovery 3](pic_analog_discovery.jpeg)
+<img src="pic_analog_discovery.jpeg" alt="Sample Measurement Setup using Analog Discovery 3" width="600" height="400">