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Add wireless mixins, clean up mixins across all mcus
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ducky64 committed Jul 1, 2023
1 parent 65706b2 commit a897cb1
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Showing 14 changed files with 104 additions and 1,746 deletions.
33 changes: 0 additions & 33 deletions electronics_abstract_parts/IoController.py
Original file line number Diff line number Diff line change
Expand Up @@ -223,14 +223,6 @@ def generate(self):
self.assign(self.actual_pin_assigns, self.ic.actual_pin_assigns)


class IoControllerI2s(BlockInterfaceMixin[BaseIoController]):
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)

self.i2s = self.Port(Vector(I2sController.empty()), optional=True)
self.implementation(lambda base: base._io_ports.insert(0, self.i2s))


@abstract_block_default(lambda: IdealIoController)
class IoController(ProgrammableController, BaseIoController):
"""An abstract, generic IO controller with optional common IOs and power ports."""
Expand All @@ -250,31 +242,6 @@ def __init__(self, *args, **kwargs) -> None:
self.require(self.gnd.is_connected())


class IoControllerGroundOut(BlockInterfaceMixin[IoController]):
"""Base class for an IO controller that can act as a power output (e.g. dev boards),
this only provides the ground source pin. Subclasses can define output power pins.
Multiple power pin mixins can be used on the same class, but only one gnd_out can be connected."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.gnd_out = self.Port(GroundSource.empty(), optional=True)


class IoControllerPowerOut(IoControllerGroundOut):
"""IO controller mixin that provides an output of the IO controller's VddIO rail, commonly 3.3v."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.pwr_out = self.Port(VoltageSource.empty(), optional=True)


class IoControllerUsbOut(IoControllerGroundOut):
"""IO controller mixin that provides an output of the IO controller's USB Vbus.
For devices without PD support, this should be 5v. For devices with PD support, this is whatever
Vbus can be."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.vusb_out = self.Port(VoltageSource.empty(), optional=True)


class IdealIoController(IoController, IdealModel, GeneratorBlock):
"""An ideal IO controller, with as many IOs as requested.
Output have voltages at pwr/gnd, all other parameters are ideal."""
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47 changes: 47 additions & 0 deletions electronics_abstract_parts/IoControllerInterfaceMixins.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
from electronics_model import *
from .IoController import BaseIoController, IoController


class IoControllerI2s(BlockInterfaceMixin[BaseIoController]):
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)

self.i2s = self.Port(Vector(I2sController.empty()), optional=True)
self.implementation(lambda base: base._io_ports.insert(0, self.i2s))


class IoControllerWifi(BlockInterfaceMixin[BaseIoController]):
"""Mixin indicating this IoController has programmable WiFi. Does not expose any ports."""


class IoControllerBluetooth(BlockInterfaceMixin[BaseIoController]):
"""Mixin indicating this IoController has programmable Bluetooth Classic. Does not expose any ports."""


class IoControllerBle(BlockInterfaceMixin[BaseIoController]):
"""Mixin indicating this IoController has programmable Bluetooth LE. Does not expose any ports."""


class IoControllerGroundOut(BlockInterfaceMixin[IoController]):
"""Base class for an IO controller that can act as a power output (e.g. dev boards),
this only provides the ground source pin. Subclasses can define output power pins.
Multiple power pin mixins can be used on the same class, but only one gnd_out can be connected."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.gnd_out = self.Port(GroundSource.empty(), optional=True)


class IoControllerPowerOut(IoControllerGroundOut):
"""IO controller mixin that provides an output of the IO controller's VddIO rail, commonly 3.3v."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.pwr_out = self.Port(VoltageSource.empty(), optional=True)


class IoControllerUsbOut(IoControllerGroundOut):
"""IO controller mixin that provides an output of the IO controller's USB Vbus.
For devices without PD support, this should be 5v. For devices with PD support, this is whatever
Vbus can be."""
def __init__(self, *args, **kwargs) -> None:
super().__init__(*args, **kwargs)
self.vusb_out = self.Port(VoltageSource.empty(), optional=True)
7 changes: 4 additions & 3 deletions electronics_abstract_parts/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -75,12 +75,13 @@

from .IoController import BaseIoController, IoController, IoControllerPowerRequired
from .IoController import BaseIoControllerPinmapGenerator, BaseIoControllerExportable
from .IoController import IoControllerI2s, IoControllerPowerOut, IoControllerUsbOut
from .IoControllerInterfaceMixins import IoControllerI2s, IoControllerPowerOut, IoControllerUsbOut
from .IoControllerInterfaceMixins import IoControllerWifi, IoControllerBluetooth, IoControllerBle
from .IoControllerProgramming import IoControllerWithSwdTargetConnector
from .IoControllerMixins import WithCrystalGenerator
from .PinMappable import PinMappable, PinMapUtil
from .PinMappable import PinResource, PeripheralFixedPin, PeripheralAnyResource, PeripheralFixedResource
from .VariantPinRemapper import VariantPinRemapper
from .IoControllerProgramming import IoControllerWithSwdTargetConnector
from .IoControllerMixins import WithCrystalGenerator

from .DummyDevices import DummyPassive, DummyVoltageSource, DummyVoltageSink, DummyDigitalSink, DummyAnalogSink
from .DummyDevices import ForcedVoltageCurrentDraw, ForcedVoltage, ForcedDigitalSinkCurrentDraw
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9 changes: 7 additions & 2 deletions electronics_lib/Microcontroller_Esp32.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,12 @@


@non_library
class Esp32_Ios(IoControllerI2s, BaseIoControllerPinmapGenerator):
class Esp32_Interfaces(IoControllerI2s, IoControllerWifi, IoControllerBle, IoControllerBluetooth, BaseIoController):
"""Defines base interfaces for ESP32 microcontrollers"""


@non_library
class Esp32_Ios(Esp32_Interfaces, BaseIoControllerPinmapGenerator):
RESOURCE_PIN_REMAP: Dict[str, str] # resource name in base -> pin name

@abstractmethod
Expand Down Expand Up @@ -218,7 +223,7 @@ def generate(self) -> None:
)


class Esp32_Wroom_32(Microcontroller, Radiofrequency, HasEspProgramming, IoControllerPowerRequired,
class Esp32_Wroom_32(Microcontroller, Radiofrequency, HasEspProgramming, Esp32_Interfaces, IoControllerPowerRequired,
BaseIoControllerExportable):
"""Wrapper around Esp32c3_Wroom02 with external capacitors and UART programming header.
NOT COMPATIBLE WITH QSPI PSRAM VARIANTS - for those, GPIO16 needs to be pulled up.
Expand Down
18 changes: 12 additions & 6 deletions electronics_lib/Microcontroller_Esp32c3.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,13 @@
from .Microcontroller_Esp import HasEspProgramming


@non_library
class Esp32c3_Interfaces(IoControllerI2s, IoControllerWifi, IoControllerBle, BaseIoController):
"""Defines base interfaces for ESP32C3 microcontrollers"""


@abstract_block
class Esp32c3_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock):
class Esp32c3_Base(Esp32c3_Interfaces, InternalSubcircuit, IoControllerPowerRequired, BaseIoControllerPinmapGenerator):
"""Base class for ESP32-C3 series devices, with RISC-V core, 2.4GHz WiF,i, BLE5, and USB.
PlatformIO: use board ID esp32-c3-devkitm-1
Expand All @@ -15,11 +20,11 @@ class Esp32c3_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, Genera
def __init__(self, **kwargs) -> None:
super().__init__(**kwargs)

self.pwr = self.Port(VoltageSink(
self.pwr.init_from(VoltageSink(
voltage_limits=(3.0, 3.6)*Volt, # section 4.2
current_draw=(0.001, 335)*mAmp + self.io_current_draw.upper() # section 4.6, from power off to RF active
), [Power])
self.gnd = self.Port(Ground(), [Common])
))
self.gnd.init_from(Ground())

self._dio_model = DigitalBidir.from_supply( # table 4.4
self.gnd, self.pwr,
Expand Down Expand Up @@ -95,7 +100,7 @@ def _io_pinmap(self) -> PinMapUtil:
])


class Esp32c3_Wroom02_Device(Esp32c3_Device, FootprintBlock, JlcPart):
class Esp32c3_Wroom02_Device(Esp32c3_Base, FootprintBlock, JlcPart):
"""ESP32C module
Module datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3-wroom-02_datasheet_en.pdf
Expand Down Expand Up @@ -139,7 +144,8 @@ def generate(self) -> None:
self.assign(self.actual_basic_part, False)


class Esp32c3_Wroom02(Microcontroller, Radiofrequency, HasEspProgramming, IoController, BaseIoControllerExportable):
class Esp32c3_Wroom02(Microcontroller, Radiofrequency, HasEspProgramming, Esp32c3_Interfaces, IoControllerPowerRequired,
BaseIoControllerExportable):
"""Wrapper around Esp32c3_Wroom02 with external capacitors and UART programming header."""
def contents(self) -> None:
super().contents()
Expand Down
17 changes: 11 additions & 6 deletions electronics_lib/Microcontroller_Esp32s3.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,12 @@


@non_library
class Esp32s3_Ios(IoControllerI2s, BaseIoControllerPinmapGenerator):
class Esp32s3_Interfaces(IoControllerI2s, IoControllerWifi, IoControllerBle, BaseIoController):
"""Defines base interfaces for ESP32S3 microcontrollers"""


@non_library
class Esp32s3_Ios(Esp32s3_Interfaces, BaseIoControllerPinmapGenerator):
"""IOs definitions independent of infrastructural (e.g. power) pins."""
RESOURCE_PIN_REMAP: Dict[str, str] # resource name in base -> pin name

Expand Down Expand Up @@ -126,7 +131,7 @@ def _io_pinmap(self) -> PinMapUtil:


@abstract_block
class Esp32s3_Base(Esp32s3_Ios, IoController, InternalSubcircuit, GeneratorBlock):
class Esp32s3_Base(Esp32s3_Ios, IoControllerPowerRequired, InternalSubcircuit, GeneratorBlock):
"""Base class for ESP32-S3 series microcontrollers with WiFi and Bluetooth (classic and LE)
and AI acceleration
Expand Down Expand Up @@ -161,7 +166,7 @@ def __init__(self, **kwargs) -> None:
self.uart0 = self.Port(UartPort(dio_model), optional=True) # programming


class Esp32s3_Wroom_1_Device(IoControllerPowerRequired, Esp32s3_Base, FootprintBlock, JlcPart):
class Esp32s3_Wroom_1_Device(Esp32s3_Base, IoControllerPowerRequired, FootprintBlock, JlcPart):
SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = {
'VDD': '2',
'GND': ['1', '40', '41'], # 41 is EP
Expand Down Expand Up @@ -222,8 +227,8 @@ def generate(self) -> None:
)


class Esp32s3_Wroom_1(Microcontroller, Radiofrequency, IoControllerI2s, HasEspProgramming,
IoControllerPowerRequired, BaseIoControllerExportable):
class Esp32s3_Wroom_1(Microcontroller, Radiofrequency, HasEspProgramming, Esp32s3_Interfaces, IoControllerPowerRequired,
BaseIoControllerExportable):
"""ESP32-S3-WROOM-1 module
"""
def contents(self) -> None:
Expand All @@ -244,7 +249,7 @@ def contents(self) -> None:
self.en_pull = imp.Block(PullupDelayRc(10 * kOhm(tol=0.05), 10*mSecond(tol=0.2))).connected(io=self.ic.chip_pu)


class Freenove_Esp32s3_Wroom(IoControllerUsbOut, IoControllerPowerOut, IoController, Esp32s3_Ios, GeneratorBlock,
class Freenove_Esp32s3_Wroom(IoControllerUsbOut, Esp32s3_Ios, IoControllerPowerOut, IoController, GeneratorBlock,
FootprintBlock):
"""Freenove ESP32S3 WROOM breakout breakout with camera.
Expand Down
2 changes: 1 addition & 1 deletion electronics_lib/Microcontroller_Lpc1549.py
Original file line number Diff line number Diff line change
Expand Up @@ -325,7 +325,7 @@ def contents(self):


@abstract_block
class Lpc1549Base(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator, IoController,
class Lpc1549Base(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator, IoControllerPowerRequired,
BaseIoControllerExportable):
DEVICE: Type[Lpc1549Base_Device] = Lpc1549Base_Device # type: ignore
DEFAULT_CRYSTAL_FREQUENCY = 12 * MHertz(tol=0.005)
Expand Down
4 changes: 2 additions & 2 deletions electronics_lib/Microcontroller_Rp2040.py
Original file line number Diff line number Diff line change
Expand Up @@ -218,8 +218,8 @@ def contents(self) -> None:
UsbBitBang.digital_external_from_link(self.usb_rp.dp)))


class Rp2040(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator, IoController,
BaseIoControllerExportable,):
class Rp2040(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator, IoControllerPowerRequired,
BaseIoControllerExportable):
DEFAULT_CRYSTAL_FREQUENCY = 12 * MHertz(tol=0.005)

def __init__(self, **kwargs):
Expand Down
6 changes: 3 additions & 3 deletions electronics_lib/Microcontroller_Stm32f103.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@


@abstract_block
class Stm32f103Base_Device(BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, JlcPart, FootprintBlock):
class Stm32f103Base_Device(InternalSubcircuit, BaseIoControllerPinmapGenerator, GeneratorBlock, JlcPart, FootprintBlock):
PACKAGE: str # package name for footprint(...)
PART: str # part name for footprint(...)
LCSC_PART: str
Expand Down Expand Up @@ -252,8 +252,8 @@ def __init__(self, resistance: RangeLike):


@abstract_block
class Stm32f103Base(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator, IoController,
BaseIoControllerExportable):
class Stm32f103Base(Microcontroller, IoControllerWithSwdTargetConnector, WithCrystalGenerator,
IoControllerPowerRequired, BaseIoControllerExportable):
DEVICE: Type[Stm32f103Base_Device] = Stm32f103Base_Device # type: ignore
DEFAULT_CRYSTAL_FREQUENCY = 12 * MHertz(tol=0.005)

Expand Down
19 changes: 12 additions & 7 deletions electronics_lib/Microcontroller_nRF52840.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,13 @@
from .JlcPart import JlcPart


@non_library
class Nrf52840_Interfaces(IoControllerI2s, IoControllerBle, BaseIoController):
"""Defines base interfaces for nRF52840 microcontrollers"""


@abstract_block
class Nrf52840Base_Device(IoControllerI2s, BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, FootprintBlock):
class Nrf52840_Base(Nrf52840_Interfaces, BaseIoControllerPinmapGenerator, InternalSubcircuit, GeneratorBlock, FootprintBlock):
"""nRF52840 base device and IO mappings
https://infocenter.nordicsemi.com/pdf/nRF52840_PS_v1.7.pdf"""
PACKAGE: str # package name for footprint(...)
Expand Down Expand Up @@ -181,7 +186,7 @@ def generate(self) -> None:
)


class Holyiot_18010_Device(Nrf52840Base_Device):
class Holyiot_18010_Device(Nrf52840_Base):
SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = {
'Vdd': '14',
'Vss': ['1', '25', '37'],
Expand Down Expand Up @@ -230,8 +235,8 @@ class Holyiot_18010_Device(Nrf52840Base_Device):
DATASHEET = 'http://www.holyiot.com/tp/2019042516322180424.pdf'


class Holyiot_18010(Microcontroller, Radiofrequency, IoControllerI2s, IoControllerWithSwdTargetConnector, IoController,
BaseIoControllerExportable):
class Holyiot_18010(Microcontroller, Radiofrequency, Nrf52840_Interfaces, IoControllerWithSwdTargetConnector,
IoControllerPowerRequired, BaseIoControllerExportable):
"""Wrapper around the Holyiot 18010 that includes supporting components (programming port)"""
def __init__(self, **kwargs):
super().__init__(**kwargs)
Expand All @@ -247,7 +252,7 @@ def contents(self):
self.connect(self.swd_node, self.ic.swd)


class Mdbt50q_1mv2_Device(Nrf52840Base_Device, JlcPart):
class Mdbt50q_1mv2_Device(Nrf52840_Base, JlcPart):
SYSTEM_PIN_REMAP: Dict[str, Union[str, List[str]]] = {
'Vdd': ['28', '30'], # 28=Vdd, 30=VddH; 31=DccH is disconnected - from section 8.3 for input voltage <3.6v
'Vss': ['1', '2', '15', '33', '55'],
Expand Down Expand Up @@ -334,8 +339,8 @@ def __init__(self):
self.connect(self.usb_outer.dm, self.res_dm.b.adapt_to(DigitalBidir()))


class Mdbt50q_1mv2(Microcontroller, Radiofrequency, IoControllerI2s, IoControllerWithSwdTargetConnector, IoController,
BaseIoControllerExportable):
class Mdbt50q_1mv2(Microcontroller, Radiofrequency, Nrf52840_Interfaces, IoControllerWithSwdTargetConnector,
IoControllerPowerRequired, BaseIoControllerExportable):
"""Wrapper around the Mdbt50q_1mv2 that includes the reference schematic"""
def __init__(self, **kwargs):
super().__init__(**kwargs)
Expand Down
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