diff --git a/boards/wch/ch32v003evt/Kconfig.wch_ch32v003evt b/boards/wch/ch32v003evt/Kconfig.wch_ch32v003evt new file mode 100644 index 000000000000000..3495fe88b376410 --- /dev/null +++ b/boards/wch/ch32v003evt/Kconfig.wch_ch32v003evt @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_WCH_CH32V003EVT + select SOC_CH32V003 diff --git a/boards/wch/ch32v003evt/board.cmake b/boards/wch/ch32v003evt/board.cmake new file mode 100644 index 000000000000000..835618aa42383c6 --- /dev/null +++ b/boards/wch/ch32v003evt/board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd "--use-elf" "--cmd-reset-halt" "halt") +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/wch/ch32v003evt/board.yml b/boards/wch/ch32v003evt/board.yml new file mode 100644 index 000000000000000..f54f77caea8af00 --- /dev/null +++ b/boards/wch/ch32v003evt/board.yml @@ -0,0 +1,5 @@ +board: + name: wch_ch32v003evt + vendor: wch + socs: + - name: ch32v003 diff --git a/boards/wch/ch32v003evt/doc/img/wch_ch32v003evt_front.webp b/boards/wch/ch32v003evt/doc/img/wch_ch32v003evt_front.webp new file mode 100644 index 000000000000000..9c1e800c7adc8b2 Binary files /dev/null and b/boards/wch/ch32v003evt/doc/img/wch_ch32v003evt_front.webp differ diff --git a/boards/wch/ch32v003evt/doc/index.rst b/boards/wch/ch32v003evt/doc/index.rst new file mode 100644 index 000000000000000..d5d3dafea04f671 --- /dev/null +++ b/boards/wch/ch32v003evt/doc/index.rst @@ -0,0 +1,116 @@ +.. _wch_ch32v003evt: + +WCH CH32V003EVT +############### + +Overview +******** + +The `WCH`_ CH32V003EVT hardware provides support for QingKe 32-bit RISC-V2A +processor and the following devices: + +* CLOCK +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` + +.. figure:: img/wch_ch32v003evt_front.webp + :align: center + :alt: WCH CH32V003EVT + + WCH CH32V003EVT (Credit: WCH) + +The board is equipped with two LEDs. The `WCH webpage on CH32V003`_ contains +the processor's information and the datasheet. + +Hardware +******** + +The QingKe 32-bit RISC-V2A processor of the WCH CH32V003EVT is clocked by an +external crystal and runs at 48 MHz. + +Supported Features +================== + +The ``wch_ch32v003evt`` board target supports the following hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| CLOCK | on-chip | clock_control | ++-----------+------------+----------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| PINCTRL | on-chip | pinctrl | ++-----------+------------+----------------------+ +| TIMER | on-chip | timer | ++-----------+------------+----------------------+ +| UART | on-chip | uart | ++-----------+------------+----------------------+ + +Other hardware features have not been enabled yet for this board. + +Connections and IOs +=================== + +LED +--- + +* LED1 = Unconnected. Connect to an I/O pin (PD4). + +Programming and Debugging +************************* + +Applications for the ``wch_ch32v003evt`` board target can be built and flashed +in the usual way (see :ref:`build_an_application` and :ref:`application_run` +for more details); however, an external programmer is required since the board +does not have any on-board debug IC. + +The following pins of the external programmer must be connected to the +following pins on the PCB (see image): + +* VCC = VCC (do not power the board from the USB port at the same time) +* GND = GND +* SWIO = PD1 + +Flashing +======== + +You can use ``minichlink`` to flash the board. Once ``minichlink`` has been set +up, build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: wch_ch32v003evt + :goals: build flash + +Debugging +========= + +This board can be debugged via OpenOCD or ``minichlink``. + +Testing the LED on the WCH CH32V003EVT +************************************** + +There is 1 sample program that allow you to test that the LED on the board is +working properly with Zephyr: + +.. code-block:: console + + samples/basic/blinky + +You can build and flash the examples to make sure Zephyr is running +correctly on your board. The button and LED definitions can be found +in :zephyr_file:`boards/wch/ch32v003evt/wch_ch32v003evt.dts`. + +References +********** + +.. target-notes:: + +.. _WCH: http://www.wch-ic.com +.. _WCH webpage on CH32V003: https://www.wch-ic.com/products/CH32V003.html diff --git a/boards/wch/ch32v003evt/support/openocd.cfg b/boards/wch/ch32v003evt/support/openocd.cfg new file mode 100644 index 000000000000000..0d24d16ca202579 --- /dev/null +++ b/boards/wch/ch32v003evt/support/openocd.cfg @@ -0,0 +1,15 @@ +#interface wlink +adapter driver wlink +wlink_set +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 +set _FLASHNAME $_CHIPNAME.flash + +flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0 + +echo "Ready for Remote Connections" diff --git a/boards/wch/ch32v003evt/wch_ch32v003evt-pinctrl.dtsi b/boards/wch/ch32v003evt/wch_ch32v003evt-pinctrl.dtsi new file mode 100644 index 000000000000000..7f33d888e755988 --- /dev/null +++ b/boards/wch/ch32v003evt/wch_ch32v003evt-pinctrl.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2024 Michael Hope + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart1_default: usart1_default { + group1 { + pinmux = ; + output-high; + drive-push-pull; + slew-rate = "max-speed-10mhz"; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; +}; diff --git a/boards/wch/ch32v003evt/wch_ch32v003evt.dts b/boards/wch/ch32v003evt/wch_ch32v003evt.dts new file mode 100644 index 000000000000000..c8cfc89b84e3dfc --- /dev/null +++ b/boards/wch/ch32v003evt/wch_ch32v003evt.dts @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Michael Hope + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "wch_ch32v003evt-pinctrl.dtsi" + +/ { + model = "ch32v003evt"; + compatible = "wch,ch32v003"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + }; + + leds { + compatible = "gpio-leds"; + + red_led: led0 { + gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>; + }; + }; + + aliases { + led0 = &red_led; + }; +}; + +&gpiod { + status = "okay"; +}; + +&usart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&usart1_default>; + pinctrl-names = "default"; +}; diff --git a/boards/wch/ch32v003evt/wch_ch32v003evt.yaml b/boards/wch/ch32v003evt/wch_ch32v003evt.yaml new file mode 100644 index 000000000000000..4b21fa5f4f6f8c9 --- /dev/null +++ b/boards/wch/ch32v003evt/wch_ch32v003evt.yaml @@ -0,0 +1,11 @@ +identifier: wch_ch32v003evt +name: WCH CH32V003 Evaluation Board +type: mcu +arch: riscv +toolchain: + - cross-compile + - zephyr +ram: 2 +flash: 16 +supported: + - gpio diff --git a/boards/wch/index.rst b/boards/wch/index.rst new file mode 100644 index 000000000000000..21745ccfccddeab --- /dev/null +++ b/boards/wch/index.rst @@ -0,0 +1,10 @@ +.. _boards-wch: + +WCH - Nanjing Qinheng Microelectronics Co. +########################################## + +.. toctree:: + :maxdepth: 1 + :glob: + + **/*