diff --git a/dts/st/wba/stm32wba50keux-pinctrl.dtsi b/dts/st/wba/stm32wba50keux-pinctrl.dtsi new file mode 100644 index 000000000..cb6435d82 --- /dev/null +++ b/dts/st/wba/stm32wba50keux-pinctrl.dtsi @@ -0,0 +1,317 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba50kgux-pinctrl.dtsi b/dts/st/wba/stm32wba50kgux-pinctrl.dtsi new file mode 100644 index 000000000..cb6435d82 --- /dev/null +++ b/dts/st/wba/stm32wba50kgux-pinctrl.dtsi @@ -0,0 +1,317 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba52ceux-pinctrl.dtsi b/dts/st/wba/stm32wba52ceux-pinctrl.dtsi new file mode 100644 index 000000000..4fbc968d3 --- /dev/null +++ b/dts/st/wba/stm32wba52ceux-pinctrl.dtsi @@ -0,0 +1,616 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb10: analog_pb10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba52cgux-pinctrl.dtsi b/dts/st/wba/stm32wba52cgux-pinctrl.dtsi new file mode 100644 index 000000000..4fbc968d3 --- /dev/null +++ b/dts/st/wba/stm32wba52cgux-pinctrl.dtsi @@ -0,0 +1,616 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb10: analog_pb10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba54ceux-pinctrl.dtsi b/dts/st/wba/stm32wba54ceux-pinctrl.dtsi new file mode 100644 index 000000000..4fbc968d3 --- /dev/null +++ b/dts/st/wba/stm32wba54ceux-pinctrl.dtsi @@ -0,0 +1,616 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb10: analog_pb10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba54cgux-pinctrl.dtsi b/dts/st/wba/stm32wba54cgux-pinctrl.dtsi new file mode 100644 index 000000000..4fbc968d3 --- /dev/null +++ b/dts/st/wba/stm32wba54cgux-pinctrl.dtsi @@ -0,0 +1,616 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb10: analog_pb10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba54keux-pinctrl.dtsi b/dts/st/wba/stm32wba54keux-pinctrl.dtsi new file mode 100644 index 000000000..022f7919c --- /dev/null +++ b/dts/st/wba/stm32wba54keux-pinctrl.dtsi @@ -0,0 +1,413 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba54kgux-pinctrl.dtsi b/dts/st/wba/stm32wba54kgux-pinctrl.dtsi new file mode 100644 index 000000000..022f7919c --- /dev/null +++ b/dts/st/wba/stm32wba54kgux-pinctrl.dtsi @@ -0,0 +1,413 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba55ceux-pinctrl.dtsi b/dts/st/wba/stm32wba55ceux-pinctrl.dtsi new file mode 100644 index 000000000..e256ef39d --- /dev/null +++ b/dts/st/wba/stm32wba55ceux-pinctrl.dtsi @@ -0,0 +1,572 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba55cgux-pinctrl.dtsi b/dts/st/wba/stm32wba55cgux-pinctrl.dtsi new file mode 100644 index 000000000..e256ef39d --- /dev/null +++ b/dts/st/wba/stm32wba55cgux-pinctrl.dtsi @@ -0,0 +1,572 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba55ueix-pinctrl.dtsi b/dts/st/wba/stm32wba55ueix-pinctrl.dtsi new file mode 100644 index 000000000..004a180b3 --- /dev/null +++ b/dts/st/wba/stm32wba55ueix-pinctrl.dtsi @@ -0,0 +1,630 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in5_pa4: adc4_in5_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa4: analog_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa4: tim16_ch1_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa4: usart1_cts_pa4 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file diff --git a/dts/st/wba/stm32wba55ugix-pinctrl.dtsi b/dts/st/wba/stm32wba55ugix-pinctrl.dtsi new file mode 100644 index 000000000..004a180b3 --- /dev/null +++ b/dts/st/wba/stm32wba55ugix-pinctrl.dtsi @@ -0,0 +1,630 @@ +/* + * NOTE: Autogenerated file using genpinctrl.py + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@42020000 { + + /* ADC_IN / ADC_INN / ADC_INP */ + + /omit-if-no-ref/ adc4_in9_pa0: adc4_in9_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in8_pa1: adc4_in8_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in7_pa2: adc4_in7_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in6_pa3: adc4_in6_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in5_pa4: adc4_in5_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in4_pa5: adc4_in4_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in3_pa6: adc4_in3_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in2_pa7: adc4_in2_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in1_pa8: adc4_in1_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ adc4_in10_pb9: adc4_in10_pb9 { + pinmux = ; + }; + + /* Analog */ + + /omit-if-no-ref/ analog_pa0: analog_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa1: analog_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa2: analog_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa3: analog_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa4: analog_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa5: analog_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa6: analog_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa7: analog_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa8: analog_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa9: analog_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa10: analog_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa11: analog_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa12: analog_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa13: analog_pa13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa14: analog_pa14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pa15: analog_pa15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb0: analog_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb1: analog_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb2: analog_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb3: analog_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb4: analog_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb5: analog_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb6: analog_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb7: analog_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb8: analog_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb9: analog_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb11: analog_pb11 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb12: analog_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb13: analog_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb14: analog_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pb15: analog_pb15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc13: analog_pc13 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc14: analog_pc14 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_pc15: analog_pc15 { + pinmux = ; + }; + + /omit-if-no-ref/ analog_ph3: analog_ph3 { + pinmux = ; + }; + + /* I2C_SCL */ + + /omit-if-no-ref/ i2c1_scl_pa15: i2c1_scl_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_scl_pb2: i2c1_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pa6: i2c3_scl_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_scl_pb2: i2c3_scl_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* I2C_SDA */ + + /omit-if-no-ref/ i2c1_sda_pb1: i2c1_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c1_sda_pb3: i2c1_sda_pb3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pa7: i2c3_sda_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ i2c3_sda_pb1: i2c3_sda_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* SPI_MISO */ + + /omit-if-no-ref/ spi1_miso_pb3: spi1_miso_pb3 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_miso_pb9: spi3_miso_pb9 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_MOSI */ + + /omit-if-no-ref/ spi1_mosi_pa15: spi1_mosi_pa15 { + pinmux = ; + bias-pull-down; + }; + + /omit-if-no-ref/ spi3_mosi_pb8: spi3_mosi_pb8 { + pinmux = ; + bias-pull-down; + }; + + /* SPI_NSS */ + + /omit-if-no-ref/ spi1_nss_pa12: spi1_nss_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ spi3_nss_pa5: spi3_nss_pa5 { + pinmux = ; + bias-pull-up; + }; + + /* SPI_SCK */ + + /omit-if-no-ref/ spi1_sck_pb4: spi1_sck_pb4 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /omit-if-no-ref/ spi3_sck_pa0: spi3_sck_pa0 { + pinmux = ; + bias-pull-down; + slew-rate = "very-high-speed"; + }; + + /* TIM_CH / TIM_CHN */ + + /omit-if-no-ref/ tim1_ch2n_pa0: tim1_ch2n_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pa1: tim1_ch1n_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pa11: tim1_ch1_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2_pa12: tim1_ch2_pa12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb0: tim1_ch3n_pb0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch2n_pb1: tim1_ch2n_pb1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1n_pb2: tim1_ch1n_pb2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4_pb3: tim1_ch4_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3_pb4: tim1_ch3_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch4n_pb7: tim1_ch4n_pb7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch1_pb8: tim1_ch1_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim1_ch3n_pb9: tim1_ch3n_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pa5: tim2_ch1_pa5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch4_pa6: tim2_ch4_pa6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch3_pa7: tim2_ch3_pa7 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch2_pa8: tim2_ch2_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb6: tim2_ch1_pb6 { + pinmux = ; + }; + + /omit-if-no-ref/ tim2_ch1_pb12: tim2_ch1_pb12 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pa0: tim3_ch3_pa0 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa1: tim3_ch2_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa2: tim3_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch2_pa9: tim3_ch2_pa9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pa10: tim3_ch1_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch1_pb5: tim3_ch1_pb5 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb9: tim3_ch4_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch4_pb13: tim3_ch4_pb13 { + pinmux = ; + }; + + /omit-if-no-ref/ tim3_ch3_pb14: tim3_ch3_pb14 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa2: tim16_ch1_pa2 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pa3: tim16_ch1n_pa3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pa4: tim16_ch1_pa4 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1n_pb8: tim16_ch1n_pb8 { + pinmux = ; + }; + + /omit-if-no-ref/ tim16_ch1_pb9: tim16_ch1_pb9 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pa1: tim17_ch1_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1n_pb3: tim17_ch1n_pb3 { + pinmux = ; + }; + + /omit-if-no-ref/ tim17_ch1_pb4: tim17_ch1_pb4 { + pinmux = ; + }; + + /* UART_CTS / USART_CTS / LPUART_CTS */ + + /omit-if-no-ref/ lpuart1_cts_pa0: lpuart1_cts_pa0 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa4: usart1_cts_pa4 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_cts_pa7: usart1_cts_pa7 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_cts_pb15: lpuart1_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb2: usart2_cts_pb2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_cts_pb15: usart2_cts_pb15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_DE / USART_DE / LPUART_DE */ + + /omit-if-no-ref/ usart1_de_pa2: usart1_de_pa2 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa3: usart1_de_pa3 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart1_de_pa6: usart1_de_pa6 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pa9: lpuart1_de_pa9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ lpuart1_de_pb9: lpuart1_de_pb9 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pa15: usart2_de_pa15 { + pinmux = ; + drive-push-pull; + }; + + /omit-if-no-ref/ usart2_de_pb1: usart2_de_pb1 { + pinmux = ; + drive-push-pull; + }; + + /* UART_RTS / USART_RTS / LPUART_RTS */ + + /omit-if-no-ref/ usart1_rts_pa2: usart1_rts_pa2 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa3: usart1_rts_pa3 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart1_rts_pa6: usart1_rts_pa6 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pa9: lpuart1_rts_pa9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ lpuart1_rts_pb9: lpuart1_rts_pb9 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pa15: usart2_rts_pa15 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /omit-if-no-ref/ usart2_rts_pb1: usart2_rts_pb1 { + pinmux = ; + bias-pull-up; + drive-open-drain; + }; + + /* UART_RX / USART_RX / LPUART_RX */ + + /omit-if-no-ref/ lpuart1_rx_pa1: lpuart1_rx_pa1 { + pinmux = ; + }; + + /omit-if-no-ref/ usart1_rx_pa8: usart1_rx_pa8 { + pinmux = ; + }; + + /omit-if-no-ref/ lpuart1_rx_pa10: lpuart1_rx_pa10 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pa11: usart2_rx_pa11 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb4: usart2_rx_pb4 { + pinmux = ; + }; + + /omit-if-no-ref/ usart2_rx_pb8: usart2_rx_pb8 { + pinmux = ; + }; + + /* UART_TX / USART_TX / LPUART_TX */ + + /omit-if-no-ref/ lpuart1_tx_pa2: lpuart1_tx_pa2 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb5: lpuart1_tx_pb5 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ lpuart1_tx_pb11: lpuart1_tx_pb11 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb12: usart1_tx_pb12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart1_tx_pb14: usart1_tx_pb14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa12: usart2_tx_pa12 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pa14: usart2_tx_pa14 { + pinmux = ; + bias-pull-up; + }; + + /omit-if-no-ref/ usart2_tx_pb0: usart2_tx_pb0 { + pinmux = ; + bias-pull-up; + }; + + }; + }; +}; \ No newline at end of file