diff --git a/riscv/CHANGELOG.md b/riscv/CHANGELOG.md index 7b2aa2fb..7f2ee262 100644 --- a/riscv/CHANGELOG.md +++ b/riscv/CHANGELOG.md @@ -20,6 +20,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Add `Mcounteren` in-memory update functions - Add `Mstatus` vector extension support - Add fallible counterparts to all functions that `panic` +- Add CSR-defining macros to create in-memory types ### Fixed diff --git a/riscv/src/lib.rs b/riscv/src/lib.rs index daa859f5..9454c48c 100644 --- a/riscv/src/lib.rs +++ b/riscv/src/lib.rs @@ -36,7 +36,7 @@ #![allow(clippy::missing_safety_doc)] pub mod asm; -pub(crate) mod bits; +pub mod bits; pub mod delay; pub mod interrupt; pub mod register; diff --git a/riscv/src/register.rs b/riscv/src/register.rs index e99264b5..be788310 100644 --- a/riscv/src/register.rs +++ b/riscv/src/register.rs @@ -107,6 +107,9 @@ pub mod minstreth; mod mhpmeventx; pub use self::mhpmeventx::*; +#[cfg(test)] +mod tests; + // TODO: Debug/Trace Registers (shared with Debug Mode) // TODO: Debug Mode Registers diff --git a/riscv/src/register/macros.rs b/riscv/src/register/macros.rs index 1153dedc..ff005c26 100644 --- a/riscv/src/register/macros.rs +++ b/riscv/src/register/macros.rs @@ -600,3 +600,510 @@ macro_rules! clear_pmp { } }; } + +/// Helper macro to define a CSR type. +/// +/// This macro creates a type represents a CSR register, without defining any bitfields. +/// +/// It is mainly used by [read_write_csr](crate::read_write_csr), +/// [read_only_csr](crate::read_only_csr), and [write_only_csr](crate::write_only_csr) macros. +#[macro_export] +macro_rules! csr { + ($(#[$doc:meta])* + $ty:ident, + $mask:literal) => { + #[repr(C)] + $(#[$doc])* + #[derive(Clone, Copy, Debug, Eq, PartialEq)] + pub struct $ty { + bits: usize, + } + + impl $ty { + /// Bitmask for legal bitfields of the CSR type. + pub const BITMASK: usize = $mask; + + /// Creates a new CSR type from raw bits value. + /// + /// Only bits in the [BITMASK](Self::BITMASK) will be set. + pub const fn from_bits(bits: usize) -> Self { + Self { bits: bits & $mask } + } + + /// Gets the raw bits value. + pub const fn bits(&self) -> usize { + self.bits & $mask + } + + /// Gets the bitmask for the CSR type's bitfields. + pub const fn bitmask(&self) -> usize { + Self::BITMASK + } + } + }; +} + +#[macro_export] +macro_rules! csr_field_enum { + ($(#[$field_ty_doc:meta])* + $field_ty:ident { + range: [$field_start:literal : $field_end:literal], + default: $default_variant:ident, + $($variant:ident = $value:expr$(,)?)+ + }$(,)? + ) => { + $(#[$field_ty_doc])* + #[repr(usize)] + #[derive(Clone, Copy, Debug, Eq, PartialEq)] + pub enum $field_ty { + $($variant = $value),+ + } + + impl $field_ty { + /// Creates a new field variant. + pub const fn new() -> Self { + Self::$default_variant + } + + /// Attempts to convert a [`usize`] into a valid variant. + pub const fn from_usize(val: usize) -> $crate::result::Result { + match val { + $($value => Ok(Self::$variant),)+ + _ => Err($crate::result::Error::InvalidVariant(val)), + } + } + + /// Converts the variant into a [`usize`]. + pub const fn into_usize(self) -> usize { + self as usize + } + } + + impl Default for $field_ty { + fn default() -> Self { + Self::new() + } + } + + impl From<$field_ty> for usize { + fn from(val: $field_ty) -> Self { + val.into_usize() + } + } + }; +} + +/// Helper macro to create a read-write CSR type. +/// +/// The type allows to read the CSR value into memory, and update the field values in-memory. +/// +/// The user can then write the entire bitfield value back into the CSR with a single write. +#[macro_export] +macro_rules! read_write_csr { + ($(#[$doc:meta])+ + $ty:ident: $csr:tt, + mask: $mask:tt$(,)? + ) => { + $crate::csr!($(#[$doc])+ $ty, $mask); + + $crate::read_csr_as!($ty, $csr); + $crate::write_csr_as!($ty, $csr); + }; +} + +/// Helper macro to create a read-only CSR type. +/// +/// The type allows to read the CSR value into memory. +#[macro_export] +macro_rules! read_only_csr { + ($(#[$doc:meta])+ + $ty:ident: $csr:tt, + mask: $mask:tt$(,)? + ) => { + $crate::csr! { $(#[$doc])+ $ty, $mask } + + $crate::read_csr_as!($ty, $csr); + }; +} + +/// Helper macro to create a read-only CSR type. +/// +/// The type allows to read the CSR value into memory. +#[macro_export] +macro_rules! write_only_csr { + ($(#[$doc:meta])+ + $ty:ident: $csr:literal, + mask: $mask:literal$(,)? + ) => { + $crate::csr! { $(#[$doc])+ $ty, $mask } + + $crate::write_csr_as!($ty, $csr); + }; +} + +/// Defines field accesor functions for a read-write CSR type. +#[macro_export] +macro_rules! read_write_csr_field { + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$set_field_doc:meta])+ + $set_field:ident, + bit: $bit:literal$(,)? + ) => { + $crate::read_only_csr_field!( + $ty, + $(#[$field_doc])+ + $field: $bit, + ); + + $crate::write_only_csr_field!( + $ty, + $(#[$set_field_doc])+ + $set_field: $bit, + ); + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + $(#[$set_field_doc:meta])+ + $set_field:ident, + $(#[$try_set_field_doc:meta])+ + $try_set_field:ident, + range: $bit_start:literal ..= $bit_end:literal$(,)? + ) => { + $crate::read_only_csr_field!( + $ty, + $(#[$field_doc])+ + $field, + $(#[$try_field_doc])+ + $try_field, + range: $bit_start ..= $bit_end, + ); + + $crate::write_only_csr_field!( + $ty, + $(#[$set_field_doc])+ + $set_field, + $(#[$try_set_field_doc])+ + $try_set_field, + range: $bit_start ..= $bit_end, + ); + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$set_field_doc:meta])+ + $set_field:ident, + range: [$bit_start:literal : $bit_end:literal]$(,)? + ) => { + $crate::read_only_csr_field!( + $ty, + $(#[$field_doc])+ + $field: [$bit_start : $bit_end], + ); + + $crate::write_only_csr_field!( + $ty, + $(#[$set_field_doc])+ + $set_field: [$bit_start : $bit_end], + ); + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + $(#[$set_field_doc:meta])+ + $set_field:ident, + $(#[$field_ty_doc:meta])+ + $field_ty:ident { + range: [$field_start:literal : $field_end:literal], + default: $default_variant:ident, + $($variant:ident = $value:expr$(,)?)+ + }$(,)? + ) => { + $crate::csr_field_enum!( + $(#[$field_ty_doc])+ + $field_ty { + range: [$field_start : $field_end], + default: $default_variant, + $($variant = $value,)+ + }, + ); + + $crate::read_only_csr_field!( + $ty, + $(#[$field_doc])+ + $field, + $(#[$try_field_doc])+ + $try_field, + $field_ty, + range: [$field_start : $field_end], + ); + + $crate::write_only_csr_field!( + $ty, + $(#[$set_field_doc])+ + $set_field, + $field_ty, + range: [$field_start : $field_end], + ); + }; +} + +/// Defines field accesor functions for a read-only CSR type. +#[macro_export] +macro_rules! read_only_csr_field { + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident: $bit:literal$(,)?) => { + const _: () = assert!($bit < usize::BITS); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&self) -> bool { + $crate::bits::bf_extract(self.bits, $bit, 1) != 0 + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + range: $bit_start:literal..=$bit_end:literal$(,)?) => { + const _: () = assert!($bit_end < usize::BITS); + const _: () = assert!($bit_start <= $bit_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&self, index: usize) -> bool { + self.$try_field(index).unwrap() + } + + $(#[$try_field_doc])+ + #[inline] + pub fn $try_field(&self, index: usize) -> $crate::result::Result { + if ($bit_start..=$bit_end).contains(&index) { + Ok($crate::bits::bf_extract(self.bits, index, 1) != 0) + } else { + Err($crate::result::Error::IndexOutOfBounds { + index, + min: $bit_start, + max: $bit_end, + }) + } + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident: [$bit_start:literal : $bit_end:literal]$(,)?) => { + const _: () = assert!($bit_end < usize::BITS); + const _: () = assert!($bit_start <= $bit_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&self) -> usize { + $crate::bits::bf_extract(self.bits, $bit_start, $bit_end - $bit_start + 1) + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + $(#[$field_ty_doc:meta])+ + $field_ty:ident { + range: [$field_start:literal : $field_end:literal], + default: $default_variant:ident, + $($variant:ident = $value:expr$(,)?)+ + }$(,)? + ) => { + $crate::csr_field_enum!( + $(#[$field_ty_doc])+ + $field_ty { + range: [$field_start : $field_end], + default: $default_variant, + $($variant = $value,)+ + }, + ); + + $crate::read_only_csr_field!( + $ty, + $(#[$field_doc])* + $field, + $(#[$try_field_doc])* + $try_field, + $field_ty, + range: [$field_start : $field_end], + ); + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + $field_ty:ident, + range: [$field_start:literal : $field_end:literal]$(,)? + ) => { + const _: () = assert!($field_end < usize::BITS); + const _: () = assert!($field_start <= $field_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&self) -> $field_ty { + self.$try_field().unwrap() + } + + $(#[$try_field_doc])+ + #[inline] + pub fn $try_field(&self) -> $crate::result::Result<$field_ty> { + let value = $crate::bits::bf_extract( + self.bits, + $field_start, + $field_end - $field_start + 1, + ); + + $field_ty::from_usize(value) + } + } + }; +} + +/// Defines field accesor functions for a write-only CSR type. +#[macro_export] +macro_rules! write_only_csr_field { + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident: $bit:literal$(,)?) => { + const _: () = assert!($bit < usize::BITS); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&mut self, $field: bool) { + self.bits = $crate::bits::bf_insert(self.bits, $bit, 1, $field as usize); + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$try_field_doc:meta])+ + $try_field:ident, + range: $bit_start:literal..=$bit_end:literal$(,)?) => { + const _: () = assert!($bit_end < usize::BITS); + const _: () = assert!($bit_start <= $bit_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&mut self, index: usize, $field: bool) { + self.$try_field(index, $field).unwrap(); + } + + $(#[$try_field_doc])+ + #[inline] + pub fn $try_field(&mut self, index: usize, $field: bool) -> $crate::result::Result<()> { + if ($bit_start..=$bit_end).contains(&index) { + self.bits = $crate::bits::bf_insert(self.bits, index, 1, $field as usize); + Ok(()) + } else { + Err($crate::result::Error::IndexOutOfBounds { + index, + min: $bit_start, + max: $bit_end, + }) + } + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident: [$bit_start:literal : $bit_end:literal]$(,)?) => { + const _: () = assert!($bit_end < usize::BITS); + const _: () = assert!($bit_start <= $bit_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&mut self, $field: usize) { + self.bits = $crate::bits::bf_insert( + self.bits, + $bit_start, + $bit_end - $bit_start + 1, + $field, + ); + } + } + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $(#[$field_ty_doc:meta])+ + $field_ty:ident { + range: [$field_start:literal : $field_end:literal], + default: $default_variant:ident, + $($variant:ident = $value:expr$(,)?)+ + }$(,)? + ) => { + $crate::csr_field_enum!( + $(#[$field_ty_doc])+ + $field_ty { + range: [$field_start : $field_end], + default: $default_variant, + $($variant = $value,)+ + }, + ); + + $crate::write_only_csr_field!( + $ty, + $(#[$field_doc])+ + $field, + $field_ty, + range: [$field_start : $field_end], + ); + }; + + ($ty:ident, + $(#[$field_doc:meta])+ + $field:ident, + $field_ty:ident, + range: [$field_start:literal : $field_end:literal]$(,)? + ) => { + const _: () = assert!($field_end < usize::BITS); + const _: () = assert!($field_start <= $field_end); + + impl $ty { + $(#[$field_doc])+ + #[inline] + pub fn $field(&mut self, $field: $field_ty) { + self.bits = $crate::bits::bf_insert( + self.bits, + $field_start, + $field_end - $field_start + 1, + $field.into(), + ); + } + } + }; +} diff --git a/riscv/src/register/mcountinhibit.rs b/riscv/src/register/mcountinhibit.rs index 60d32af3..1ec86285 100644 --- a/riscv/src/register/mcountinhibit.rs +++ b/riscv/src/register/mcountinhibit.rs @@ -1,100 +1,63 @@ //! `mcountinhibit` register -use crate::bits::{bf_extract, bf_insert}; use crate::result::{Error, Result}; -/// `mcountinhibit` register -#[derive(Clone, Copy, Debug)] -pub struct Mcountinhibit { - bits: usize, +read_write_csr! { + /// `mcountinhibit` register + Mcountinhibit: 0x320, + mask: 0xffff_fffd, } -impl Mcountinhibit { - /// Machine "cycle\[h\]" Disable - #[inline] - pub fn cy(&self) -> bool { - bf_extract(self.bits, 0, 1) != 0 - } +set!(0x320); +clear!(0x320); - /// Sets whether to inhibit the "cycle\[h\]" counter. +read_write_csr_field! { + Mcountinhibit, + /// Gets the `cycle[h]` inhibit field value. + cy, + /// Sets the `cycle[h]` inhibit field value. /// - /// Only updates the in-memory value, does not modify the `mcountinhibit` register. - #[inline] - pub fn set_cy(&mut self, cy: bool) { - self.bits = bf_insert(self.bits, 0, 1, cy as usize); - } - - /// Machine "instret\[h\]" Disable - #[inline] - pub fn ir(&self) -> bool { - bf_extract(self.bits, 2, 1) != 0 - } + /// **NOTE**: only updates the in-memory value without touching the CSR. + set_cy, + bit: 0, +} - /// Sets whether to inhibit the "instret\[h\]" counter. +read_write_csr_field! { + Mcountinhibit, + /// Gets the `instret[h]` inhibit field value. + ir, + /// Sets the `instret[h]` inhibit field value. /// - /// Only updates the in-memory value, does not modify the `mcountinhibit` register. - #[inline] - pub fn set_ir(&mut self, ir: bool) { - self.bits = bf_insert(self.bits, 2, 1, ir as usize); - } - - /// Machine "hpm\[x\]" Disable (bits 3-31) - #[inline] - pub fn hpm(&self, index: usize) -> bool { - assert!((3..32).contains(&index)); - bf_extract(self.bits, index, 1) != 0 - } + /// **NOTE**: only updates the in-memory value without touching the CSR. + set_ir, + bit: 2, +} - /// Machine "hpm\[x\]" Disable (bits 3-31) +read_write_csr_field! { + Mcountinhibit, + /// Gets the `mhpmcounterX[h]` inhibit field value. /// - /// Attempts to read the "hpm\[x\]" value, and returns an error if the index is invalid. - #[inline] - pub fn try_hpm(&self, index: usize) -> Result { - if (3..32).contains(&index) { - Ok(bf_extract(self.bits, index, 1) != 0) - } else { - Err(Error::IndexOutOfBounds { - index, - min: 3, - max: 31, - }) - } - } - - /// Sets whether to inhibit the "hpm\[X\]" counter. + /// **WARN**: `index` must be in the range `[31:3]`. + hpm, + /// Attempts to get the `mhpmcounterX[h]` inhibit field value. /// - /// Only updates the in-memory value, does not modify the `mcountinhibit` register. - #[inline] - pub fn set_hpm(&mut self, index: usize, hpm: bool) { - assert!((3..32).contains(&index)); - self.bits = bf_insert(self.bits, index, 1, hpm as usize); - } - - /// Sets whether to inhibit the "hpm\[X\]" counter. + /// **WARN**: `index` must be in the range `[31:3]`. + try_hpm, + /// Sets the `mhpmcounterX[h]` inhibit field value. /// - /// Only updates the in-memory value, does not modify the `mcountinhibit` register. + /// **WARN**: `index` must be in the range `[31:3]`. /// - /// Attempts to update the "hpm\[x\]" value, and returns an error if the index is invalid. - #[inline] - pub fn try_set_hpm(&mut self, index: usize, hpm: bool) -> Result<()> { - if (3..32).contains(&index) { - self.bits = bf_insert(self.bits, index, 1, hpm as usize); - Ok(()) - } else { - Err(Error::IndexOutOfBounds { - index, - min: 3, - max: 31, - }) - } - } + /// **NOTE**: only updates the in-memory value without touching the CSR. + set_hpm, + /// Sets the `mhpmcounterX[h]` inhibit field value. + /// + /// **WARN**: `index` must be in the range `[31:3]`. + /// + /// **NOTE**: only updates the in-memory value without touching the CSR. + try_set_hpm, + range: 3..=31, } -read_csr_as!(Mcountinhibit, 0x320); -write_csr_as!(Mcountinhibit, 0x320); -set!(0x320); -clear!(0x320); - set_clear_csr!( /// Machine cycle Disable , set_cy, clear_cy, 1 << 0); diff --git a/riscv/src/register/tests.rs b/riscv/src/register/tests.rs new file mode 100644 index 00000000..639fd0df --- /dev/null +++ b/riscv/src/register/tests.rs @@ -0,0 +1,3 @@ +mod read_only_csr; +mod read_write_csr; +mod write_only_csr; diff --git a/riscv/src/register/tests/read_only_csr.rs b/riscv/src/register/tests/read_only_csr.rs new file mode 100644 index 00000000..f9ec1278 --- /dev/null +++ b/riscv/src/register/tests/read_only_csr.rs @@ -0,0 +1,122 @@ +use crate::result::{Error, Result}; + +read_only_csr! { + /// test CSR register type + Mtest: 0x000, + mask: 0b1111_1111_1111, +} + +read_only_csr_field! { + Mtest, + /// test single-bit field + single: 0, +} + +read_only_csr_field! { + Mtest, + /// multiple single-bit field range + multi_range, + /// try-getter multiple single-bit field range + try_multi_range, + range: 1..=3, +} + +read_only_csr_field!( + Mtest, + /// multi-bit field + multi_field: [4:7], +); + +read_only_csr_field!( + Mtest, + /// multi-bit field + field_enum, + /// try-getter multi-bit field + try_field_enum, + /// field enum type with valid field variants + MtestFieldEnum { + range: [8:11], + default: Field1, + Field1 = 1, + Field2 = 2, + Field3 = 3, + Field4 = 15, + }, +); + +// we don't test the `read` function, we are only testing in-memory functions. +#[allow(unused)] +pub fn _read_csr() -> Mtest { + read() +} + +#[allow(unused)] +pub fn _try_read_csr() -> Result { + try_read() +} + +#[test] +fn test_mtest_read_only() { + let mut mtest = Mtest::from_bits(0); + + assert_eq!(mtest.bitmask(), Mtest::BITMASK); + assert_eq!(mtest.bits(), 0); + + // check that single bit field getter/setters work. + assert_eq!(mtest.single(), false); + + mtest = Mtest::from_bits(1); + assert_eq!(mtest.single(), true); + + mtest = Mtest::from_bits(0); + + // check that single bit range field getter/setters work. + for i in 1..=3 { + assert_eq!(mtest.multi_range(i), false); + assert_eq!(mtest.try_multi_range(i), Ok(false)); + + mtest = Mtest::from_bits(1 << i); + assert_eq!(mtest.multi_range(i), true); + assert_eq!(mtest.try_multi_range(i), Ok(true)); + + mtest = Mtest::from_bits(0 << i); + assert_eq!(mtest.multi_range(i), false); + assert_eq!(mtest.try_multi_range(i), Ok(false)); + } + + // check that multi-bit field getter/setters work. + assert_eq!(mtest.multi_field(), 0); + + mtest = Mtest::from_bits(0xf << 4); + assert_eq!(mtest.multi_field(), 0xf); + + mtest = Mtest::from_bits(0x3 << 4); + assert_eq!(mtest.multi_field(), 0x3); + + // check that only bits in the field are set. + mtest = Mtest::from_bits(0xff << 4); + assert_eq!(mtest.multi_field(), 0xf); + assert_eq!(mtest.bits(), 0xff << 4); + + mtest = Mtest::from_bits(0x0 << 4); + assert_eq!(mtest.multi_field(), 0x0); + + assert_eq!(mtest.try_field_enum(), Err(Error::InvalidVariant(0)),); + + [ + MtestFieldEnum::Field1, + MtestFieldEnum::Field2, + MtestFieldEnum::Field3, + MtestFieldEnum::Field4, + ] + .into_iter() + .for_each(|variant| { + mtest = Mtest::from_bits(variant.into_usize() << 8); + assert_eq!(mtest.field_enum(), variant); + assert_eq!(mtest.try_field_enum(), Ok(variant)); + }); + + // check that setting an invalid variant returns `None` + mtest = Mtest::from_bits(0xbad << 8); + assert_eq!(mtest.try_field_enum(), Err(Error::InvalidVariant(13)),); +} diff --git a/riscv/src/register/tests/read_write_csr.rs b/riscv/src/register/tests/read_write_csr.rs new file mode 100644 index 00000000..c3981afa --- /dev/null +++ b/riscv/src/register/tests/read_write_csr.rs @@ -0,0 +1,142 @@ +use crate::result::{Error, Result}; + +read_write_csr! { + /// test CSR register type + Mtest: 0x000, + mask: 0b1111_1111_1111, +} + +read_write_csr_field! { + Mtest, + /// test single-bit field + single, + /// setter test single-bit field + set_single, + bit: 0, +} + +read_write_csr_field! { + Mtest, + /// multiple single-bit field range + multi_range, + /// try-get multiple single-bit field range + try_multi_range, + /// setter multiple single-bit field range + set_multi_range, + /// try-setter multiple single-bit field range + try_set_multi_range, + range: 1..=3, +} + +read_write_csr_field!( + Mtest, + /// multi-bit field + multi_field, + /// setter multi-bit field + set_multi_field, + range: [4:7], +); + +read_write_csr_field!( + Mtest, + /// multi-bit field + field_enum, + /// try-get multi-bit field + try_field_enum, + /// setter multi-bit field + set_field_enum, + /// field enum type with valid field variants + MtestFieldEnum { + range: [8:11], + default: Field1, + Field1 = 1, + Field2 = 2, + Field3 = 3, + Field4 = 15, + } +); + +// we don't test the `read` and `write` functions, we are only testing in-memory functions. +#[allow(unused)] +pub fn _read_csr() -> Mtest { + read() +} + +#[allow(unused)] +pub fn _try_read_csr() -> Result { + try_read() +} + +#[allow(unused)] +pub fn _write_csr(csr: Mtest) { + write(csr); +} + +#[allow(unused)] +pub fn _try_write_csr(csr: Mtest) { + try_write(csr); +} + +#[test] +fn test_mtest_read_write() { + let mut mtest = Mtest::from_bits(0); + + assert_eq!(mtest.bitmask(), Mtest::BITMASK); + assert_eq!(mtest.bits(), 0); + + // check that single bit field getter/setters work. + assert_eq!(mtest.single(), false); + + mtest.set_single(true); + assert_eq!(mtest.single(), true); + + mtest.set_single(false); + assert_eq!(mtest.single(), false); + + // check that single bit range field getter/setters work. + for i in 1..=3 { + assert_eq!(mtest.multi_range(i), false); + + mtest.set_multi_range(i, true); + assert_eq!(mtest.multi_range(i), true); + + mtest.set_multi_range(i, false); + assert_eq!(mtest.multi_range(i), false); + } + + // check that multi-bit field getter/setters work. + assert_eq!(mtest.multi_field(), 0); + + mtest.set_multi_field(0xf); + assert_eq!(mtest.multi_field(), 0xf); + + mtest.set_multi_field(0x3); + assert_eq!(mtest.multi_field(), 0x3); + + // check that only bits in the field are set. + mtest.set_multi_field(0xff); + assert_eq!(mtest.multi_field(), 0xf); + assert_eq!(mtest.bits(), 0xf << 4); + + mtest.set_multi_field(0x0); + assert_eq!(mtest.multi_field(), 0x0); + + assert_eq!(mtest.try_field_enum(), Err(Error::InvalidVariant(0))); + + [ + MtestFieldEnum::Field1, + MtestFieldEnum::Field2, + MtestFieldEnum::Field3, + MtestFieldEnum::Field4, + ] + .into_iter() + .for_each(|variant| { + mtest.set_field_enum(variant); + assert_eq!(mtest.field_enum(), variant); + assert_eq!(mtest.try_field_enum(), Ok(variant)); + }); + + // check that setting an invalid variant returns `None` + mtest = Mtest::from_bits(0xbad << 8); + assert_eq!(mtest.try_field_enum(), Err(Error::InvalidVariant(13))); +} diff --git a/riscv/src/register/tests/write_only_csr.rs b/riscv/src/register/tests/write_only_csr.rs new file mode 100644 index 00000000..73de0d0a --- /dev/null +++ b/riscv/src/register/tests/write_only_csr.rs @@ -0,0 +1,118 @@ +use crate::result::{Error, Result}; + +write_only_csr! { + /// test CSR register type + Mtest: 0x000, + mask: 0b1111_1111_1111, +} + +write_only_csr_field! { + Mtest, + /// setter test single-bit field + set_single: 0, +} + +write_only_csr_field! { + Mtest, + /// setter multiple single-bit field range + set_multi_range, + /// try-setter multiple single-bit field range + try_set_multi_range, + range: 1..=3, +} + +write_only_csr_field!( + Mtest, + /// setter multi-bit field + set_multi_field: [4:7], +); + +write_only_csr_field!( + Mtest, + /// setter multi-bit field + set_field_enum, + /// field enum type with valid field variants + MtestFieldEnum { + range: [8:11], + default: Field1, + Field1 = 1, + Field2 = 2, + Field3 = 3, + Field4 = 15, + }, +); + +// we don't test the `write` function, we are only testing in-memory functions. +#[allow(unused)] +pub fn _write_csr(csr: Mtest) { + write(csr); +} + +#[allow(unused)] +pub fn _try_write_csr(csr: Mtest) -> Result<()> { + try_write(csr) +} + +#[test] +fn test_mtest_write_only() { + let mut mtest = Mtest::from_bits(0); + + assert_eq!(mtest.bitmask(), Mtest::BITMASK); + assert_eq!(mtest.bits(), 0); + + // check that single bit field getter/setters work. + mtest.set_single(true); + assert_eq!(mtest.bits(), 1); + + mtest.set_single(false); + assert_eq!(mtest.bits(), 0); + + // check that single bit range field getter/setters work. + for i in 1..=3 { + mtest.set_multi_range(i, true); + assert_ne!(mtest.bits() & (1 << i), 0); + + mtest.set_multi_range(i, false); + assert_eq!(mtest.bits() & (1 << i), 0); + } + + // check that multi-bit field getter/setters work. + mtest.set_multi_field(0xf); + assert_eq!(mtest.bits() >> 4, 0xf); + + mtest.set_multi_field(0x3); + assert_eq!(mtest.bits() >> 4, 0x3); + + // check that only bits in the field are set. + mtest.set_multi_field(0xff); + assert_eq!(mtest.bits() >> 4, 0xf); + + mtest.set_multi_field(0x0); + assert_eq!(mtest.bits() >> 4, 0x0); + + mtest = Mtest::from_bits(0); + + assert_eq!( + MtestFieldEnum::from_usize(mtest.bits() >> 8), + Err(Error::InvalidVariant(0)) + ); + + [ + MtestFieldEnum::Field1, + MtestFieldEnum::Field2, + MtestFieldEnum::Field3, + MtestFieldEnum::Field4, + ] + .into_iter() + .for_each(|variant| { + mtest.set_field_enum(variant); + assert_eq!(MtestFieldEnum::from_usize(mtest.bits() >> 8), Ok(variant)); + }); + + // check that setting an invalid variant returns `None` + mtest = Mtest::from_bits(0xbad << 8); + assert_eq!( + MtestFieldEnum::from_usize(mtest.bits() >> 8), + Err(Error::InvalidVariant(13)) + ); +}