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TickCount mistake in Indexed addressing calc? #84
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Thenks @ecurtz .. I quickly checked http://gtoal.com/SBTPROJECT/6809sbt/reference-emulators/larry-bank/6809.C - there also 5 and 3 cycles are used for this call... also mame looks like they use 5 or 8 cycles ( But I'm not that knee deep into the cpu6809 at the moment so this make's me wonder how did you find out? |
I was looking into doing a version that works with the real 6809 quad clock timing rather than abstract cycle counts so I was going through the instructions and that one didn't seem to match. This chart is from the data sheet, I believe bottom right is the op in question. https://drive.google.com/file/d/1GmlqhsqqrwYNgE2mRUsZC9HS0Hply8xc/view?usp=sharing |
thanks, this looks interesting.. do you have time for a pr? this would be fantastic! |
I have a PCB on order that should let me test it on a real 6809 and I'll report back whenever that arrives. It would just be changing a single number, so not much of a PR, but I'll be happy to do so if it turns out the current one is wrong. |
would be fantastic, thanks! I do have some in depth tests that run and where we can see what the actual difference is (like https://github.com/neophob/wpc-emu-dumps) |
You'll have to double check this, but I believe there's an error in the cycle count for index address mode 0x0F. TickCount is increased by 5, which is the correct total, but this case is only available as indirect which will add another 3 cycles.
This is around line 595 of cpu6809.js:
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