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phy: Add buffers on SDPHYDATAW/R datapaths to improve timings. ci #57: Commit 8f15cbe pushed by enjoy-digital
November 7, 2023 15:55 2m 17s timing_improvements
timing_improvements
November 7, 2023 15:55 2m 17s
phy: Add buffers on SDPHYDATAW/R datapaths to improve timings. ci #56: Commit 8f15cbe pushed by enjoy-digital
November 7, 2023 15:20 2m 39s clocker_bufg
clocker_bufg
November 7, 2023 15:20 2m 39s
phy: Use BUFG on Xilinx devices to route clocker.ce to improve timings. ci #55: Commit 3c9b241 pushed by enjoy-digital
November 7, 2023 14:26 2m 50s clocker_bufg
clocker_bufg
November 7, 2023 14:26 2m 50s
Merge pull request #31 from gsomlo/gls-cmd-irq ci #54: Commit cf6ab89 pushed by enjoy-digital
October 5, 2023 06:23 2m 31s master
master
October 5, 2023 06:23 2m 31s
core: add edge-triggered irq signal for command completion ci #53: Pull request #31 opened by gsomlo
September 25, 2023 03:24 2m 12s gsomlo:gls-cmd-irq
gsomlo:gls-cmd-irq
September 25, 2023 03:24 2m 12s
phy: Update with LiteX improvements. ci #52: Commit e018257 pushed by enjoy-digital
September 14, 2023 08:49 2m 14s 2023.08
2023.08
September 14, 2023 08:49 2m 14s
phy: Update with LiteX improvements. ci #51: Commit e018257 pushed by enjoy-digital
July 26, 2023 14:30 2m 57s master
master
July 26, 2023 14:30 2m 57s