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fft_biplex_init_xblock.m
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fft_biplex_init_xblock.m
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://casper.berkeley.edu %
% Copyright (C) 2011 Hong Chen %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fft_biplex_init_xblock(varargin)
% 'depend',{'fft_biplex_core_init_xblock','fft_stage_n_init_xblock','fft_butterfly_init_xblock',...
% 'butterfly_arith_dsp48e_init_xblock',...
% 'fft_twiddle_init_xblock','simd_add_dsp48e_init_xblock',...
% 'convert_of_init_xblock', ...
% 'c_to_ri_init_xblock','cmacc_dsp48e_init_xblock',...
% 'simd_add_dsp48e_init_xblock','coeff_gen_init_xblock'}
%'depend',{'biplex_cplx_unscrambler_init_xblock','delay_bram_en_plus_init_xblock','dbl_buffer_init_xblock'}
% Set default vararg values.
defaults = {'FFTSize', 2, ...
'input_bit_width', 18, ...
'coeff_bit_width', 18, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'overflow', 'Saturate', ...
'add_latency', 1, ...
'mult_latency', 2, ...
'bram_latency', 2, ...
'conv_latency', 1, ...
'arch', 'Virtex5', ...
'opt_target', 'logic', ...
'coeffs_bit_limit', 8, ...
'delays_bit_limit', 8, ...
'specify_mult', 'off', ...
'mult_spec', [2 2], ...
'hardcode_shifts', 'off', ...
'shift_schedule', [1 1], ...
'dsp48_adders', 'off', ...
'bit_growth_chart', [0 0]};
% Retrieve values from mask fields.
FFTSize = get_var('FFTSize', 'defaults', defaults, varargin{:});
input_bit_width = get_var('input_bit_width', 'defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
overflow = get_var('overflow', 'defaults', defaults, varargin{:});
arch = get_var('arch', 'defaults', defaults, varargin{:});
opt_target = get_var('opt_target', 'defaults', defaults, varargin{:});
coeffs_bit_limit = get_var('coeffs_bit_limit', 'defaults', defaults, varargin{:});
delays_bit_limit = get_var('delays_bit_limit', 'defaults', defaults, varargin{:});
specify_mult = get_var('specify_mult', 'defaults', defaults, varargin{:});
mult_spec = get_var('mult_spec', 'defaults', defaults, varargin{:});
hardcode_shifts = get_var('hardcode_shifts', 'defaults', defaults, varargin{:});
shift_schedule = get_var('shift_schedule', 'defaults', defaults, varargin{:});
dsp48_adders = get_var('dsp48_adders', 'defaults', defaults, varargin{:});
bit_growth_chart = get_var('bit_growth_chart', 'defaults', defaults, varargin{:});
%% inports
xlsub2_sync = xInport('sync');
xlsub2_shift = xInport('shift');
xlsub2_pol1 = xInport('pol1');
xlsub2_pol2 = xInport('pol2');
%% outports
xlsub2_sync_out = xOutport('sync_out');
xlsub2_pol1_out = xOutport('pol1_out');
xlsub2_pol2_out = xOutport('pol2_out');
xlsub2_of = xOutport('of');
%% diagram
% block: temp_fft_biplex/fft_biplex1/biplex_core
xlsub2_biplex_core_out1 = xSignal;
xlsub2_biplex_core_out2 = xSignal;
xlsub2_biplex_core_out3 = xSignal;
xlsub2_biplex_core_sub = xBlock(struct('source', str2func('fft_biplex_core_init_xblock'), 'name', 'biplex_core',...
'depend',{{'fft_biplex_core_init_xblock','fft_stage_n_init_xblock','fft_butterfly_init_xblock',...
'butterfly_arith_dsp48e_init_xblock',...
'fft_twiddle_init_xblock','simd_add_dsp48e_init_xblock',...
'convert_of_init_xblock', ...
'c_to_ri_init_xblock','cmacc_dsp48e_init_xblock',...
'simd_add_dsp48e_init_xblock','coeff_gen_init_xblock'}}), ...
struct( 'FFTSize', FFTSize,...
'input_bit_width', input_bit_width,...
'coeff_bit_width', coeff_bit_width,...
'quantization', quantization,...
'overflow', overflow,...
'add_latency', add_latency,...
'mult_latency', mult_latency,...
'bram_latency', bram_latency,...
'conv_latency', conv_latency, ...
'arch', arch, ...
'opt_target', opt_target, ...
'coeffs_bit_limit', coeffs_bit_limit, ...
'delays_bit_limit', delays_bit_limit, ...
'hardcore_shifts',hardcode_shifts,...
'shift_schedule', shift_schedule, ...
'specify_mult', specify_mult, ...
'mult_spec', mult_spec, ...
'dsp48_adders', dsp48_adders, ...
'bit_growth_chart', bit_growth_chart), ... % {3, 18, 18, 1, 2, 2, 1, 'Round (unbiased: +/- Inf)', 'Saturate', 'Virtex5', 'logic', 8, 8, 'off', getfield( getfield( get_param( gcb,'UserData' ), 'parameters'),'mult_spec'), 'off', getfield( getfield( get_param( gcb,'UserData' ), 'parameters'),'shift_schedule'), 'off'}, ...
{xlsub2_sync, xlsub2_shift, xlsub2_pol1, xlsub2_pol2}, ...
{xlsub2_biplex_core_out1, xlsub2_biplex_core_out2, xlsub2_biplex_core_out3, xlsub2_of});
% block: temp_fft_biplex/fft_biplex1/biplex_cplx_unscrambler
xlsub2_biplex_cplx_unscrambler_sub = xBlock(struct('source',str2func('biplex_cplx_unscrambler_init_xblock'), 'name', 'biplex_cplx_unscrambler',...
'depend',{{'biplex_cplx_unscrambler_init_xblock','delay_bram_en_plus_init_xblock','dbl_buffer_init_xblock'}}), ...
{FFTSize,bram_latency},...
{xlsub2_biplex_core_out2, xlsub2_biplex_core_out3, xlsub2_biplex_core_out1}, ...
{xlsub2_pol1_out, xlsub2_pol2_out, xlsub2_sync_out});
end