diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 2edaf670503ac..f77a678cb12da 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -145,7 +145,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v10-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-linux.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-maizhuo-linux.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v14-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-linux.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-mizhuo-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-ipc-6x-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-linux.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10-linux.dts index a00649f9f7111..db3028981f133 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10-linux.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10-linux.dts @@ -11,7 +11,7 @@ / { model = "Mekotronics R58X (RK3588 EDGE LP4x V1.0 BlueBerry Board)"; - compatible = "rockchip,rk3588-hugsun-edge-v10-linux", "rockchip,rk3588"; + compatible = "rockchip,rk3588-blueberry-edge-v10-linux", "rockchip,rk3588"; /delete-node/ chosen; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10.dtsi index 434520b38c132..76645d26c83e7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v10.dtsi @@ -299,6 +299,7 @@ &hdmi0 { enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + cec-enable = "true" ; status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-linux.dts index afc5a868d9876..01d0dd5cdf210 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-linux.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-linux.dts @@ -11,7 +11,7 @@ / { model = "Mekotronics R58X-4G (RK3588 EDGE LP4x V1.2 BlueBerry Board)"; - compatible = "rockchip,rk3588-hugsun-edge-v12-linux", "rockchip,rk3588"; + compatible = "rockchip,rk3588-blueberry-edge-v12-linux", "rockchip,rk3588"; /delete-node/ chosen; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-maizhuo-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-maizhuo-linux.dts new file mode 100644 index 0000000000000..c50ad4456d346 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12-maizhuo-linux.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include "rk3588-blueberry-edge-v12.dtsi" +#include "rk3588-linux.dtsi" + +/ { + model = "RK3588 EDGE LP4x V1.2 MeiZhuo BlueBerry Board"; + compatible = "rockchip,rk3588-blueberry-edge-v12-linux", "rockchip,rk3588"; + /delete-node/ chosen; + + vk2c21_lcd { + compatible = "lcd_vk2c21"; + i2c_scl = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + i2c_sda = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + + status = "okay";//"okay"; //zxLog_2022.9.20 for maozhuo time-lcd show; + }; +}; + +&gpio_keys{ + vol_up { + debounce-interval = <0>; + autorepeat = <1>; + gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + label = "GPIO Key Vol+"; + linux,code = ; + wakeup-source; + }; + + vol_down { + debounce-interval = <0>; + autorepeat = <1>; + gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; + label = "GPIO Key Vol-"; + linux,code = ; + wakeup-source; + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12.dtsi index 3cd744bff8532..a6da0292e7376 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v12.dtsi @@ -29,11 +29,7 @@ status = "okay"; compatible = "rockchip,multicodecs-card"; rockchip,card-name = "rockchip-es8388"; - hp-det-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; - io-channels = <&saradc 3>; - io-channel-names = "adc-detect"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; + //hp-det-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; rockchip,format = "i2s"; rockchip,mclk-fs = <256>; rockchip,cpu = <&i2s0_8ch>; @@ -53,11 +49,6 @@ "RINPUT2", "Headset Mic"; pinctrl-names = "default"; pinctrl-0 = <&hp_det>; - play-pause-key { - label = "playpause"; - linux,code = ; - press-threshold-microvolt = <2000>; - }; }; rk_headset: rk-headset { @@ -214,6 +205,13 @@ vin-supply = <&vcc5v0_sys>; }; + modem { + compatible = "rockchip,modem"; + status = "okay"; + power-on_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + reset_gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; //GPIO_C4 + }; + wireless_bluetooth: wireless-bluetooth { compatible = "bluetooth-platdata"; clocks = <&hym8563>; @@ -323,6 +321,7 @@ &hdmi0 { enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + cec-enable = "true" ; status = "okay"; }; @@ -343,10 +342,11 @@ &hdmirx_ctrler { status = "okay"; - #sound-dai-cells = <1>; /* Effective level used to trigger HPD: 0-low, 1-high */ hpd-trigger-level = <1>; - hdmirx-det-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; //gpio1_d5 + hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; //gpio1_d5 + pinctrl-names = "default"; + pinctrl-0 = <&hdmim1_rx &hdmirx_det>; }; &i2c0 { @@ -663,6 +663,20 @@ max-frequency = <200000000>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; + full-pwr-cycle-in-suspend; + status = "okay"; +}; + +&sdmmc { + max-frequency = <150000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd_s0>; status = "okay"; }; @@ -700,6 +714,12 @@ }; }; + hdmi { + hdmirx_det: hdmirx-det { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + headphone { hp_det: hp-det { rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14-linux.dts new file mode 100644 index 0000000000000..2332aeb23d05f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14-linux.dts @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include "rk3588-blueberry-edge-v14.dtsi" +#include "rk3588-linux.dtsi" + +/ { + model = "RK3588 EDGE LP4x V1.4 BlueBerry Board"; + compatible = "rockchip,rk3588-blueberry-edge-v14-linux", "rockchip,rk3588"; + /delete-node/ chosen; +}; + +&pwm3 { + compatible = "rockchip,remotectl-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3m0_pins>; + remote_pwm_id = <3>; + handle_cpu_id = <1>; + remote_support_psci = <0>; + status = "okay"; + + ir_key1 { //hugsun blue remote + rockchip,usercode = <0x7f80>; + rockchip,key_table = + <0xec KEY_REPLY>, + <0xd8 KEY_BACK>, + <0xc7 KEY_UP>, + <0xbf KEY_DOWN>, + <0xc8 KEY_LEFT>, + <0xc6 KEY_RIGHT>, + <0x8c KEY_HOME>, + <0x78 KEY_VOLUMEUP>, + <0x76 KEY_VOLUMEDOWN>, + <0x7e KEY_POWER>, + <0xed KEY_POWER>, //20171123 + <0x7c KEY_MENU>, + <0xb7 388>; + }; + + ir_key2 { //hugsun + rockchip,usercode = <0xef10>; + rockchip,key_table = + <0xa2 KEY_POWER>, + <0xe8 KEY_VOLUMEUP>, + <0xec KEY_VOLUMEDOWN>, + <0xa6 141>,//KEY_SETUP>, + <0xa5 388>, + <0xff KEY_BACK>, + <0xba KEY_UP>, + <0xf8 KEY_LEFT>, + <0xbe KEY_REPLY>, + <0xfe KEY_RIGHT>, + <0xaa KEY_DOWN>, + <0xb9 KEY_HOME>, + <0xfa KEY_MENU>, + <0xe5 KEY_REWIND>, + <0xa7 KEY_PLAYPAUSE>, + <0xe2 KEY_FASTFORWARD>, + <0xa0 77>, //@ + <0xb0 KEY_0>, + <0xa1 14>, + <0xaf KEY_1>, + <0xad KEY_2>, + <0xef KEY_3>, + <0xb3 KEY_4>, + <0xb5 KEY_5>, + <0xee KEY_6>, + <0xf0 KEY_7>, + <0xb1 KEY_8>, + <0xf2 KEY_9>; + }; + + ir_key3 { + rockchip,usercode = <0xdf00>; + rockchip,key_table = + <0xe3 KEY_POWER>, + <0xb4 63>, //youtube + <0xfe 67>, //Media Center + <0xa2 KEY_VOLUMEUP>, + <0xb0 66>, //Netflix + <0xa0 68>, //SetupWizard + <0xa3 KEY_VOLUMEDOWN>, + + <0xbd KEY_HOME>, + <0xf5 KEY_BACK>, + + <0xe5 KEY_UP>, + <0xb8 KEY_LEFT>, + <0xf9 KEY_REPLY>, + <0xf8 KEY_RIGHT>, + <0xb7 KEY_DOWN>, + <0xfc 388>, + <0xe7 KEY_MENU>, + + <0xab KEY_1>, + <0xe9 KEY_2>, + <0xea KEY_3>, + <0xaf KEY_4>, + <0xed KEY_5>, + <0xee KEY_6>, + <0xb3 KEY_7>, + <0xf1 KEY_8>, + <0xf2 KEY_9>, + <0xbe 227>, //Fn + <0xf3 KEY_0>, + <0xef 14>; + + }; + + ir_key4{ + rockchip,usercode = <0x4040>; + rockchip,key_table = + <0x4d KEY_POWER>; //power (for 2.4g) + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14.dtsi new file mode 100644 index 0000000000000..df14645b0b855 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-edge-v14.dtsi @@ -0,0 +1,1063 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +#include "dt-bindings/usb/pd.h" +#include "rk3588.dtsi" +#include "rk3588-blueberry.dtsi" +#include "rk3588-rk806-single.dtsi" + +/ { + /* If hdmirx node is disabled, delete the reserved-memory node here. */ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Reserve 256MB memory for hdmirx-controller@fdee0000 */ + cma { + compatible = "shared-dma-pool"; + reusable; + reg = <0x0 (256 * 0x100000) 0x0 (256 * 0x100000)>; + linux,cma-default; + }; + }; + + es8388_sound: es8388-sound { + status = "okay"; + compatible = "rockchip,multicodecs-card"; + rockchip,card-name = "rockchip-es8388"; + //hp-det-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; + rockchip,format = "i2s"; + rockchip,mclk-fs = <256>; + rockchip,cpu = <&i2s0_8ch>; + rockchip,codec = <&es8388>; + rockchip,audio-routing = + "Headphone", "LOUT1", + "Headphone", "ROUT1", + "Speaker", "LOUT2", + "Speaker", "ROUT2", + "Headphone", "Headphone Power", + "Headphone", "Headphone Power", + "Speaker", "Speaker Power", + "Speaker", "Speaker Power", + "LINPUT1", "Main Mic", + "LINPUT2", "Main Mic", + "RINPUT1", "Headset Mic", + "RINPUT2", "Headset Mic"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + }; + + rk_headset: rk-headset { + status = "disabled"; + compatible = "rockchip_headset"; + headset_gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + io-channels = <&saradc 3>; + }; + + hdmiin-sound { + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <128>; + rockchip,format = "i2s"; + rockchip,bitclock-master = <&hdmirx_ctrler>; + rockchip,frame-master = <&hdmirx_ctrler>; + rockchip,card-name = "rockchip,hdmiin"; + rockchip,cpu = <&i2s7_8ch>; + rockchip,codec = <&hdmirx_ctrler 0>; + rockchip,jack-det; + }; + + + leds: leds { + compatible = "gpio-leds"; + wifi_led: wifi-led { + gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + hdd_led: hdd-led { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + eth_led: eth-led { + gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + work_led: work-led { + gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; + //linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + power { + debounce-interval = <100>; + gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; + //gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = ; + wakeup-source; + }; + }; + + vk2c21_lcd { + compatible = "lcd_vk2c21"; + i2c_scl = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + i2c_sda = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + + status = "disabled";//"okay"; //zxLog_2022.9.20 for maozhuo time-lcd show; + }; + + pcie30_avdd0v75: pcie30-avdd0v75 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v75"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + vin-supply = <&vdd_0v75_s0>; + }; + + pcie30_avdd1v8: pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&avcc_1v8_s0>; + }; + + vcc12v_dcin: vcc12v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_pcie30: vcc3v3-pcie30 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie30_en>; + gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; //hugsun gpio1_c4 + startup-delay-us = <10000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + }; + + vcc5v0_otg: vcc5v0-otg-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + modem { + compatible = "rockchip,modem"; + status = "okay"; + power-on_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + reset_gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; //GPIO_C4 + }; + + ext_cam_clk: external-camera-clock { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "CLK_CAMERA_24MHZ"; + #clock-cells = <0>; + }; + + wireless_bluetooth: wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&hym8563>; + clock-names = "ext_clock"; + uart_rts_gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart6m1_rtsn>, <&bt_gpio>; + pinctrl-1 = <&uart6_gpios>; + BT,reset_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + BT,wake_gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless_wlan: wireless-wlan { + compatible = "wlan-platdata"; + wifi_chip_type = "ap6275p"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>; + WIFI,host_wake_irq = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; + WIFI,poweren_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&dp0 { + status = "disable"; +}; + +//&dp0_in_vp2 { +// status = "okay"; +//}; + +&dp1 { + pinctrl-0 = <&dp1m0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dp1_in_vp2 { + status = "okay"; +}; + +&dp1_sound{ + status = "okay"; +}; + +&gmac0 { + /* Use rgmii-rxid mode to disable rx delay inside Soc */ + phy-mode = "rgmii-rxid"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay = <0x44>; + /* rx_delay = <0x4f>; */ + + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + /* Use rgmii-rxid mode to disable rx delay inside Soc */ + phy-mode = "rgmii-rxid"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; + + tx_delay = <0x42>; + /* rx_delay = <0x4f>; */ + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&hdmi0 { + enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + cec-enable = "true" ; + status = "okay"; +}; + +&hdmi0_in_vp0 { + status = "okay"; +}; + +&hdmi0_sound { + status = "okay"; +}; + +&hdptxphy_hdmi0 { + status = "okay"; +}; + +/* lt6911 hdmi in */ +&mipi2_csi2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy0_out>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi2_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi2_in0>; + }; + }; + }; +}; + +&csi2_dphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_lt6911: endpoint@1 { + reg = <1>; + remote-endpoint = <<6911_out>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csidphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi2_csi2_input>; + }; + }; + }; +}; + +&csi2_dphy0_hw { + status = "okay"; +}; + +&i2c7 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c7m2_xfer>; + status = "okay"; + + lt6911:lt6911@2b { + compatible = "lontium,lt6911uxc"; + status = "okay"; + reg = <0x2b>; + clocks = <&ext_cam_clk>; + clock-names = "xvclk"; + power-domains = <&power RK3588_PD_VI>; + pinctrl-names = "default"; + pinctrl-0 = <<6911uxc_pin>; + interrupt-parent = <&gpio3>; + interrupts = ; + reset-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_LOW>; + plugin-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; + rockchip,camera-module-index = <1>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "lt6911"; + rockchip,camera-module-lens-name = "default"; + port { + lt6911_out: endpoint { + remote-endpoint = <&mipi_in_lt6911>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds2 { + status = "okay"; + + port { + cif_mipi2_in0: endpoint { + remote-endpoint = <&mipi2_csi2_output>; + }; + }; +}; + +&rkcif_mipi_lvds2_sditf { + status = "okay"; + + port { + mipi_lvds2_sditf: endpoint { + remote-endpoint = <&isp0_vir0>; + }; + }; +}; + +&rkcif_mmu { + status = "okay"; +}; + +&rkisp0 { + status = "okay"; +}; + +&isp0_mmu { + status = "okay"; +}; + +&rkisp0_vir0 { + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds2_sditf>; + }; + }; +}; + +/* lt6911 hdmi in end */ + +/* Should work with at least 128MB cma reserved above. */ +&hdmirx_ctrler { + status = "disabled"; + + /* Effective level used to trigger HPD: 0-low, 1-high */ + hpd-trigger-level = <1>; + hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; //gpio1_d5 + pinctrl-names = "default"; + pinctrl-0 = <&hdmim1_rx &hdmirx_det>; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + + vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big0_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { + compatible = "rockchip,rk8603"; + reg = <0x43>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big1_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c2 { + status = "okay"; + + vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_npu_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c3 { + status = "okay"; + es8388: es8388@10 { + status = "okay"; + #sound-dai-cells = <0>; + compatible = "everest,es8388", "everest,es8323"; + reg = <0x10>; + clocks = <&mclkout_i2s0>; + clock-names = "mclk"; + assigned-clocks = <&mclkout_i2s0>; + assigned-clock-rates = <12288000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_mclk>; + }; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m3_xfer>; + status = "okay"; +}; + +&i2c6 { + status = "okay"; + usbc0: fusb302@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio3>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vcc5v0_otg>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_role_sw: endpoint@0 { + remote-endpoint = <&dwc3_0_role_switch>; + }; + }; + }; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + op-sink-microwatt = <1000000>; + sink-pdos = + ; + source-pdos = + ; + + altmodes { + #address-cells = <1>; + #size-cells = <0>; + + altmode@0 { + reg = <0>; + svid = <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_orien_sw: endpoint { + remote-endpoint = <&usbdp_phy0_orientation_switch>; + }; + }; + + port@1 { + reg = <1>; + dp_altmode_mux: endpoint { + remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; + }; + }; + }; + }; + }; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + interrupt-parent = <&gpio0>; + interrupts = ; + wakeup-source; + }; +}; + +&i2s0_8ch { + status = "okay"; + pinctrl-0 = <&i2s0_lrck + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; +}; + +//hdmi01 sound +&i2s5_8ch { + status = "okay"; +}; + +//hdmi02 sound +&i2s6_8ch { + status = "okay"; +}; + +//hdmiin sound +&i2s7_8ch { + status = "okay"; +}; + +&spdif_tx2 { + status = "okay"; +}; + +&spdif_tx5 { + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&pcie2x1l0 { + reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; + rockchip,skip-scan-in-resume; + status = "okay"; +}; + + +&pcie30phy { + rockchip,pcie30-phymode = ; + status = "okay"; +}; + +&pcie3x4 { + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&rk806single { + pinctrl-names = "default", "pmic-power-off"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; + pinctrl-1 = <&rk806_dvs1_slp>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + regulators { + avcc_1v8_s0: PLDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + }; +}; + +&vdd_log_s0 { //fox.luo@2022.05.26 don't wake up + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; +}; + +&rockchip_suspend { + status = "okay"; + rockchip,sleep-debug-en = <1>; + rockchip,virtual-poweroff = <1>; + rockchip,sleep-mode-config = < + (0 + | RKPM_SLP_ARMOFF_DDRPD + ) + >; + rockchip,wakeup-config = < + (0 + | RKPM_CPU0_WKUP_EN + | RKPM_GPIO_WKUP_EN + ) + >; +}; + +&route_dp1 { + status = "okay"; + connect = <&vp2_out_dp1>; +}; + +&route_hdmi0 { + status = "okay"; + connect = <&vp0_out_hdmi0>; +}; + +&sata0 { + status = "okay"; +}; + +//rs485 +&uart0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0m2_xfer>; +}; + +//rs232 +&uart3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3m2_xfer>; +}; + +&uart6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn>; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + full-pwr-cycle-in-suspend; + status = "okay"; +}; + +&sdmmc { + max-frequency = <150000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + + +&pinctrl { + + + wireless-bluetooth { + uart6_gpios: uart6-gpios { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_gpio: bt-gpio { + rockchip,pins = + <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, + <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + wireless-wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + wifi_poweren_gpio: wifi-poweren-gpio { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + //rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hdmi { + hdmirx_det: hdmirx-det { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + }; + + usb-typec { + usbc0_int: usbc0-int { + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmiin { + lt6911uxc_pin: lt6911uxc-pin { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + vcc3v3_pcie30_en: vcc3v3-pcie30-en { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + }; +}; + +//type-c0 +&u2phy0 { + status = "okay"; +}; + +&u2phy1 { + status = "okay"; +}; + +//usb2.0 host0 +&u2phy2 { + status = "okay"; +}; + +//usb2.0 host1 +&u2phy3 { + status = "okay"; +}; + +&u2phy0_otg { + rockchip,typec-vbus-det; + status = "okay"; +}; + +&u2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdp_phy0 { + orientation-switch; + svid = <0xff01>; + sbu1-dc-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + usbdp_phy0_orientation_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_orien_sw>; + }; + + usbdp_phy0_dp_altmode_mux: endpoint@1 { + reg = <1>; + remote-endpoint = <&dp_altmode_mux>; + }; + }; +}; + +&usbdp_phy0_dp { + status = "okay"; +}; + +&usbdp_phy0_u3 { + status = "okay"; +}; + +&usbdp_phy1 { + rockchip,dp-lane-mux = < 0 1 2 3 >; + status = "okay"; +}; + +&usbdp_phy1_dp { + status = "okay"; +}; + +&usbdp_phy1_u3 { + maximum-speed = "high-speed"; + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "otg"; + usb-role-switch; + status = "okay"; + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_0_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_role_sw>; + }; + }; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; + maximum-speed = "high-speed"; + status = "okay"; +}; + +&usbhost3_0 { + status = "okay"; +}; + +&usbhost_dwc3_0 { + dr_mode = "host"; + status = "okay"; +}; + +&vdd_vdenc_s0 { + regulator-init-microvolt = <750000>; +}; + diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-linux.dts index 1ed02353453aa..d94829d0d5b9d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-linux.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-linux.dts @@ -11,7 +11,7 @@ / { model = "Mekotronics R58 MiniPC (RK3588 MINIPC LP4x V1.0 BlueBerry Board)"; - compatible = "rockchip,rk3588-hugsun-minipc-linux", "rockchip,rk3588"; + compatible = "rockchip,rk3588-blueberry-minipc-linux", "rockchip,rk3588"; /delete-node/ chosen; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-mizhuo-linux.dts b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-mizhuo-linux.dts new file mode 100644 index 0000000000000..368e4ff2c94bf --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc-mizhuo-linux.dts @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include "rk3588-blueberry-minipc.dtsi" +#include "rk3588-linux.dtsi" + +/ { + model = "RK3588 MINIPC-MIZHUO LP4x V1.0 BlueBerry Board"; + compatible = "rockchip,rk3588-blueberry-minipc-linux", "rockchip,rk3588"; + /delete-node/ chosen; +}; + +&work_led { + linux,default-trigger = "default-on"; //"timer"; + default-state = "on"; +}; + +&pwm3 { + compatible = "rockchip,remotectl-pwm"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3m0_pins>; + remote_pwm_id = <3>; + handle_cpu_id = <1>; + remote_support_psci = <0>; + status = "okay"; + + ir_key1 { //hugsun blue remote ��mizhuo�� + rockchip,usercode = <0x7f80>; + rockchip,key_table = + <0xec KEY_F11>, + <0xd8 KEY_F2>, + <0xc7 KEY_F7>, + <0xbf KEY_F8>, + <0xc8 KEY_F9>, + <0xc6 KEY_F10>, + <0x8c KEY_F1>, + <0x78 KEY_F6>, + <0x76 KEY_F4>, + <0x7e KEY_F12>, + <0x7c KEY_F3>, + <0xb7 KEY_F5>; + }; + + ir_key2 { //hugsun + rockchip,usercode = <0xef10>; + rockchip,key_table = + <0xa2 KEY_POWER>, + <0xe8 KEY_VOLUMEUP>, + <0xec KEY_VOLUMEDOWN>, + <0xa6 141>,//KEY_SETUP>, + <0xa5 388>, + <0xff KEY_BACK>, + <0xba KEY_UP>, + <0xf8 KEY_LEFT>, + <0xbe KEY_REPLY>, + <0xfe KEY_RIGHT>, + <0xaa KEY_DOWN>, + <0xb9 KEY_HOME>, + <0xfa KEY_MENU>, + <0xe5 KEY_REWIND>, + <0xa7 KEY_PLAYPAUSE>, + <0xe2 KEY_FASTFORWARD>, + <0xa0 77>, //@ + <0xb0 KEY_0>, + <0xa1 14>, + <0xaf KEY_1>, + <0xad KEY_2>, + <0xef KEY_3>, + <0xb3 KEY_4>, + <0xb5 KEY_5>, + <0xee KEY_6>, + <0xf0 KEY_7>, + <0xb1 KEY_8>, + <0xf2 KEY_9>; + }; + + ir_key3 { + rockchip,usercode = <0xdf00>; + rockchip,key_table = + <0xe3 KEY_POWER>, + <0xb4 63>, //youtube + <0xfe 67>, //Media Center + <0xa2 KEY_VOLUMEUP>, + <0xb0 66>, //Netflix + <0xa0 68>, //SetupWizard + <0xa3 KEY_VOLUMEDOWN>, + + <0xbd KEY_HOME>, + <0xf5 KEY_BACK>, + + <0xe5 KEY_UP>, + <0xb8 KEY_LEFT>, + <0xf9 KEY_REPLY>, + <0xf8 KEY_RIGHT>, + <0xb7 KEY_DOWN>, + <0xfc 388>, + <0xe7 KEY_MENU>, + + <0xab KEY_1>, + <0xe9 KEY_2>, + <0xea KEY_3>, + <0xaf KEY_4>, + <0xed KEY_5>, + <0xee KEY_6>, + <0xb3 KEY_7>, + <0xf1 KEY_8>, + <0xf2 KEY_9>, + <0xbe 227>, //Fn + <0xf3 KEY_0>, + <0xef 14>; + + }; + + ir_key4{ + rockchip,usercode = <0x4040>; + rockchip,key_table = + <0x4d KEY_POWER>; //power (for 2.4g) + }; +}; + diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc.dtsi index 943eadc28a8b2..c800635e67cd3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-minipc.dtsi @@ -232,6 +232,7 @@ &hdmi0 { enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + cec-enable = "true" ; hdcp1x-enable; status = "okay"; }; @@ -250,6 +251,7 @@ &hdmi1 { enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; + cec-enable = "true" ; hdcp1x-enable; status = "okay"; }; @@ -480,6 +482,10 @@ }; }; +&wdt { + status = "okay"; +}; + &vdd_log_s0 { //fox.luo@2022.05.26 don't wake up regulator-state-mem { regulator-on-in-suspend; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry.dtsi index 314245082aa3a..058d0ce059f70 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-blueberry.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry.dtsi @@ -24,29 +24,16 @@ vol-up-key { label = "volume up"; linux,code = ; - press-threshold-microvolt = <1750>; + press-threshold-microvolt = <17000>; }; - }; - hdmi0_sound: hdmi0-sound { - status = "disabled"; - compatible = "rockchip,hdmi"; - rockchip,mclk-fs = <128>; - rockchip,card-name = "rockchip-hdmi0"; - rockchip,cpu = <&i2s5_8ch>; - rockchip,codec = <&hdmi0>; - rockchip,jack-det; - }; + vol-down-key { + label = "volume down"; + linux,code = ; + press-threshold-microvolt = <417000>; + }; - hdmi1_sound: hdmi1-sound { - status = "disabled"; - compatible = "rockchip,hdmi"; - rockchip,mclk-fs = <128>; - rockchip,card-name = "rockchip-hdmi1"; - rockchip,cpu = <&i2s6_8ch>; - rockchip,codec = <&hdmi1>; - rockchip,jack-det; - }; + }; dp0_sound: dp0-sound { status = "disabled"; @@ -68,6 +55,26 @@ rockchip,jack-det; }; + hdmi0_sound: hdmi0-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <128>; + rockchip,card-name = "rockchip-hdmi0"; + rockchip,cpu = <&i2s5_8ch>; + rockchip,codec = <&hdmi0>; + rockchip,jack-det; + }; + + hdmi1_sound: hdmi1-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <128>; + rockchip,card-name = "rockchip-hdmi1"; + rockchip,cpu = <&i2s6_8ch>; + rockchip,codec = <&hdmi1>; + rockchip,jack-det; + }; + test-power { status = "okay"; }; @@ -256,6 +263,8 @@ }; &rkvenc0 { + venc-supply = <&vdd_vdenc_s0>; + mem-supply = <&vdd_vdenc_mem_s0>; status = "okay"; }; @@ -264,6 +273,8 @@ }; &rkvenc1 { + venc-supply = <&vdd_vdenc_s0>; + mem-supply = <&vdd_vdenc_mem_s0>; status = "okay"; }; diff --git a/drivers/char/Makefile b/drivers/char/Makefile index ffce287ef4155..130b5557aa73f 100644 --- a/drivers/char/Makefile +++ b/drivers/char/Makefile @@ -47,3 +47,5 @@ obj-$(CONFIG_PS3_FLASH) += ps3flash.o obj-$(CONFIG_XILLYBUS) += xillybus/ obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o obj-$(CONFIG_ADI) += adi.o +#fox.luo@add vk2c21 lcd driver +obj-y += lcd_vk2c21.o diff --git a/drivers/char/lcd_vk2c21.c b/drivers/char/lcd_vk2c21.c new file mode 100644 index 0000000000000..0afde806a38d2 --- /dev/null +++ b/drivers/char/lcd_vk2c21.c @@ -0,0 +1,707 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LCD_EXT_DEBUG_INFO +#ifdef LCD_EXT_DEBUG_INFO +#define DBG_PRINT(...) printk(__VA_ARGS__) +#else +#define DBG_PRINT(...) +#endif +#define DEVICE_NAME "lcd_vk2c21" +/* ioctrl magic set */ +#define CH455_IOC_MAGIC 'h' +#define IOCTL_CHAR_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x10, unsigned char) +#define IOCTL_DOT_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x11, unsigned char) +#define IOCTL_COLON_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x12, unsigned char) +#define IOCTL_PWR_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x13, unsigned char) +#define IOCTL_LAN_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x14, unsigned char) +#define IOCTL_LAN_OFF _IOWR(CH455_IOC_MAGIC, 0x15, unsigned char) +#define IOCTL_WIFI_LOW_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x16, unsigned char) +#define IOCTL_WIFI_FINE_DISPLAY _IOWR(CH455_IOC_MAGIC, 0x17, unsigned char) +#define IOCTL_WIFI_OFF _IOWR(CH455_IOC_MAGIC, 0x18, unsigned char) +#define IOCTL_LED_ON _IOWR(CH455_IOC_MAGIC, 0x19, unsigned char) +#define IOCTL_LED_OFF _IOWR(CH455_IOC_MAGIC, 0x1a, unsigned char) + +//以下管脚输出定义根据客户单片机做相应的修改 +#define Vk2c21_SCL_H() gpio_set_value(gpio_i2c_scl,1) +#define Vk2c21_SCL_L() gpio_set_value(gpio_i2c_scl,0) + +#define Vk2c21_SDA_H() gpio_set_value(gpio_i2c_sda,1) +#define Vk2c21_SDA_L() gpio_set_value(gpio_i2c_sda,0) + +#define Vk2c21_GET_SDA() gpio_get_value(gpio_i2c_sda) +#define Vk2c21_SET_SDA_IN() gpio_direction_input(gpio_i2c_sda) +#define Vk2c21_SET_SDA_OUT() gpio_direction_output(gpio_i2c_sda, 1) + +static int gpio_i2c_scl,gpio_i2c_sda; +/** +****************************************************************************** +* @file vk2c21.c +* @author kevin_guo +* @version V1.2 +* @date 05-17-2020 +* @brief This file contains all the vk2c21 functions. +* 此文件适用于 VK2c21 +****************************************************************************** +* @attention +****************************************************************************** +*/ +#include "lcd_vk2c21.h" + +#define VK2c21_CLK 100 //SCL信号线频率,由delay_nus实现 50->10kHz 10->50kHz 5->100kHz +//驱动seg数 +//4com +//VK2C21A/B/C/D +#define Vk2c21_SEGNUM 13 +#define Vk2c21A_MAXSEGNUM 20 +#define Vk2c21B_MAXSEGNUM 16 +#define Vk2c21C_MAXSEGNUM 12 +#define Vk2c21D_MAXSEGNUM 8 + +//segtab[]数组对应实际的芯片到LCD连线，连线见-VK2c21参考电路 +//4com +//Vk2c21A +unsigned char vk2c21_segtab[Vk2c21_SEGNUM]={ + 18,17,16,15,14,13,12,11,10, + 9,8,7,6 +}; + +//4com +unsigned char vk2c21_dispram[Vk2c21_SEGNUM/2];//4COM时每个字节数据对应2个SEG +//8com +//unsigned char vk2c21_dispram[Vk2c21_SEGNUM];//8COM时每个字节数据对应1个SEG + +unsigned char shuzi_zimo[15]= //数字和字符字模 +{ + //0 1 2 3 4 5 6 7 8 9 - L o H i + 0xf5,0x05,0xb6,0x97,0x47,0xd3,0xf3,0x85,0xf7,0xd7,0x02,0x70,0x33,0x67,0x50 +}; +unsigned char vk2c21_segi,vk2c21_comi; +unsigned char vk2c21_maxcom;//驱动的com数VK2C23A可以是4com或者8com +unsigned char vk2c21_maxseg;//Vk2c21A=20 Vk2c21B=16 Vk2c21C=12 Vk2c21D=8 +/* Private function prototypes -----------------------------------------------*/ +unsigned char Vk2c21_InitSequence(void); +/* Private function ----------------------------------------------------------*/ + + +/******************************************************************************* +* Function Name : delay_nus +* Description : 延时1uS程序 +* Input : n->延时时间nuS +* Output : None +* Return : None +*******************************************************************************/ +static void delay_nus(unsigned int n) +{ + ndelay(n); +} +/******************************************************************************* +* Function Name : I2CStart I2CStop I2CSlaveAck +* I2CStart Description : 时钟线高时，数据线由高到低的跳变，表示I2C开始信号 +* I2CStop Description : 时钟线高时，数据线由低到高的跳变，表示I2C停止信号 +* I2CSlaveAck Description : I2C从机设备应答查询 +*******************************************************************************/ +static void Vk2c21_I2CStart( void ) +{ + Vk2c21_SCL_H(); + Vk2c21_SDA_H(); + delay_nus(VK2c21_CLK); + Vk2c21_SDA_L(); + delay_nus(VK2c21_CLK); +} + +static void Vk2c21_I2CStop( void ) +{ + Vk2c21_SCL_H(); + Vk2c21_SDA_L(); + delay_nus(VK2c21_CLK); + Vk2c21_SDA_H(); + delay_nus(VK2c21_CLK); +} + +static unsigned char Vk2c21_I2CSlaveAck( void ) +{ + unsigned int TimeOut; + unsigned char RetValue; + + Vk2c21_SCL_L(); + //单片机SDA脚为单向IO要设为输入脚 + Vk2c21_SET_SDA_IN(); + delay_nus(VK2c21_CLK); + Vk2c21_SCL_H();//第9个sclk上升沿 + + TimeOut = 10000; + while( TimeOut-- > 0 ) + { + if( Vk2c21_GET_SDA()!=0 )//读取ack + { + RetValue = 1; + } + else + { + RetValue = 0; + break; + } + } + Vk2c21_SCL_L(); + //单片机SDA脚为单向IO要设为输出脚 + Vk2c21_SET_SDA_OUT(); + //printk("---%s----ret=%d------\n",__func__,RetValue); + return RetValue; +} +/******************************************************************************* +* Function Name : I2CWriteByte +* Description : I2C写一字节命令,命令先送高位 +* Input : byte-要写入的数据 +* Output : None +* Return : None +*******************************************************************************/ +static void Vk2c21_I2CWriteByte( unsigned char byte ) +{ + unsigned char i=8; + while (i--) + { + Vk2c21_SCL_L(); + if(byte&0x80) + Vk2c21_SDA_H(); + else + Vk2c21_SDA_L(); + byte<<=1; + delay_nus(VK2c21_CLK); + Vk2c21_SCL_H(); + delay_nus(VK2c21_CLK); + } +} + +/************************************************************* +*函数名称: WriteCmdVk2c21 +*函数功能: 向Vk2C23写1个命令 +*输入参数: addr Dmod地址 + data 写入的数据 +*输出参数：SET: 写入正常；RESET:写入错误 +*备 注： +**************************************************************/ +static unsigned char WriteCmdVk2c21(unsigned char cmd, unsigned char data ) +{ + Vk2c21_I2CStart(); + + Vk2c21_I2CWriteByte( Vk2c21_ADDR|0x00 ); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + Vk2c21_I2CWriteByte( cmd ); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + Vk2c21_I2CWriteByte( data ); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + Vk2c21_I2CStop(); + + return 0; //返回操作成败标志 +} +/******************************************************************************* +* Function Name : Write1Data +* Description : 写1字节数据到显示RAM +* Input : Addr-写入ram的地址 +* : Dat->写入ram的数据 +* Output : None +* Return : 0-ok 1-fail +*******************************************************************************/ +static unsigned char Write1DataVk2c21(unsigned char Addr,unsigned char Dat) +{ + //START 信号 + Vk2c21_I2CStart(); + //SLAVE地址 + Vk2c21_I2CWriteByte(Vk2c21_ADDR); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 1; + } + //写显示RAM命令 + Vk2c21_I2CWriteByte(Vk2c21_RWRAM); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + //显示RAM地址 + Vk2c21_I2CWriteByte(Addr); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 1; + } + //显示数据，1字节数据包含2个SEG + Vk2c21_I2CWriteByte(Dat); + if( Vk2c21_I2CSlaveAck()==1 ) + { + Vk2c21_I2CStop(); + return 1; + } + //STOP信号 + Vk2c21_I2CStop(); + return 0; +} +/******************************************************************************* +* Function Name : WritenData +* Description : 写多个数据到显示RAM +* Input : Addr-写入ram的起始地址 +* : Databuf->写入ram的数据buffer指针 +* : Cnt->写入ram的数据个数 +* Output : None +* Return : 0-ok 1-fail +*******************************************************************************/ +static unsigned char WritenDataVk2c21(unsigned char Addr,unsigned char *Databuf,unsigned char Cnt) +{ + unsigned char n; + + //START信号 + Vk2c21_I2CStart(); + //SLAVE地址 + Vk2c21_I2CWriteByte(Vk2c21_ADDR); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + //写显示RAM命令 + Vk2c21_I2CWriteByte(Vk2c21_RWRAM); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + //显示RAM起始地址 + Vk2c21_I2CWriteByte(Addr); + if( 1 == Vk2c21_I2CSlaveAck() ) + { + Vk2c21_I2CStop(); + return 0; + } + //发送Cnt个数据到显示RAM + for(n=0;n写入ram的数据(1个字节数据对应2个SEG) +* Output : None +* Return : None +*******************************************************************************/ +static void Vk2c21_DisAll(unsigned char dat) +{ + unsigned char segi; + unsigned char dispram[16]; + + if(vk2c21_maxcom==4) + { + for(segi=0;segi<10;segi++) + { + dispram[segi]=dat; + } + WritenDataVk2c21(0,dispram,10);//这里送8bit数据对应2个SEG，每8bit数据地址加1，每8位数据1个ACK + } + else + { + for(segi=0;segi<16;segi++) + { + dispram[segi]=dat; + } + WritenDataVk2c21(0,dispram,16);//这里送8bit数据对应1个SEG，每8bit数据地址加1，每8位数据1个ACK + } +} +/******************************************************************************* +* Function Name : DisSegComOn +* Description : 点亮1个点(1个seg和1个com交叉对应的显示点) +* Input ：seg->点对应的seg脚 +* ：com->点对应com脚 +* Output : None +* Return : None +*******************************************************************************/ +static void Vk2c21_DisSegComOn(unsigned char seg,unsigned char com) +{ + if(vk2c21_maxcom==4) + { + if(seg%2==0) + Write1DataVk2c21(seg/2,(1<<(com)));//这里送8位数据低4bit有效，每8bit数据地址加1，每8位数据1个ACK) + else + Write1DataVk2c21(seg/2,(1<<(4+com)));//这里送8位数据高4bit有效，每8bit数据地址加1，每8位数据1个ACK + } + else + { + Write1DataVk2c21(seg,(1<<(com)));//这里送8位数据低4bit有效，每8bit数据地址加1，每8位数据1个ACK + } +} +/******************************************************************************* +* Function Name : DisSegComOff +* Description : 关闭1个点(1个seg和1个com交叉对应的显示点) +* Input ：seg->点对应的seg脚 +* ：com->点对应com脚 +* Output : None +* Return : None +*******************************************************************************/ +static void Vk2c21_DisSegComOff(unsigned char seg,unsigned char com) +{ + if(vk2c21_maxcom==4) + { + if(seg%2==0) + Write1DataVk2c21(seg/2,~(1<0偏置电压=VLCD + WriteCmdVk2c21(Vk2c21_IVASET,VLCDSEL_IVAOFF_R1); + //SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.652VDD 1/4bias=0.714VDD + //WriteCmdVk2c21(Vk2c21_IVASET,SEGSEL_IVA02H); + + //test + Vk2c21_DisAll(0x00); + disp_3num(456); + //Vk2c21_DisAll(0xff); //LCD全显 + //disp_3num(1234); + return ret; +} + +static int Vk2c21_open(struct inode *inode, struct file *file) +{ + int ret; + ret = nonseekable_open(inode, file); + if(ret < 0) + return ret; + return 0; +} + +static int Vk2c21_release(struct inode *inode, struct file *file) +{ + return 0; +} + +static long Vk2c21_ioctl(struct file *file, unsigned int cmd, unsigned long args) +{ + int ret = 0 , i=0,pos_temp=0; + void __user *argp = (void __user *)args; + unsigned char display_arg[6]={0}; + switch (cmd){ + case IOCTL_CHAR_DISPLAY: + if (args) { + ret = copy_from_user(display_arg, argp,sizeof(display_arg)/sizeof(display_arg[0])); + } + for(i=0;i<6;i++) + { + if(display_arg[i] <= '9' && display_arg[i] >= '0') + { + pos_temp = display_arg[i] - '0'; + vk2c21_dispram[i]&=0xf0; + vk2c21_dispram[i]|=shuzi_zimo[pos_temp]&0x0f; + vk2c21_dispram[i]&=0x8f; + vk2c21_dispram[i]|=shuzi_zimo[pos_temp]&0xf0; + Write1DataVk2c21(vk2c21_segtab[2*i+2]/2,vk2c21_dispram[i]); + }else if(display_arg[i] <= 'z' && display_arg[i] >= 'a'){ + }else if(display_arg[i] <= 'Z' && display_arg[i] >= 'A'){ + } + } + break; + case IOCTL_DOT_DISPLAY: + break; + case IOCTL_COLON_DISPLAY: + break; + case IOCTL_PWR_DISPLAY: + break; + case IOCTL_LAN_DISPLAY: + Vk2c21_DisSegComOn(vk2c21_segtab[6],0x1); + break; + case IOCTL_LAN_OFF: + Vk2c21_DisSegComOff(vk2c21_segtab[6],0x1); + break; + case IOCTL_WIFI_LOW_DISPLAY: + break; + case IOCTL_WIFI_FINE_DISPLAY: + break; + case IOCTL_WIFI_OFF: + break; + case IOCTL_LED_ON: + Vk2c21_DisAll(0xff); //LCD全显 + break; + case IOCTL_LED_OFF: + Vk2c21_DisAll(0x00); //LCD全关 + break; + default: + printk("ERROR: IOCTL CMD NOT FOUND!!!\n"); + break; + } + return 0; +} +static struct file_operations Vk2c21_fops ={ + .owner =THIS_MODULE, + .open =Vk2c21_open, + .release =Vk2c21_release, + .unlocked_ioctl =Vk2c21_ioctl, +}; + + + +static int Vk2c21_probe(struct platform_device *pdev) +{ + static struct class * scull_class; + struct device_node *node = pdev->dev.of_node; + enum of_gpio_flags flags; + int ret; + + ret =register_chrdev(0,DEVICE_NAME,&Vk2c21_fops); + if(ret<0){ + printk("can't register device lcd_vk2c21.\n"); + return ret; + } + printk("register device lcd_vk2c21 success.\n"); + + scull_class = class_create(THIS_MODULE,DEVICE_NAME); + if(IS_ERR(scull_class)) + { + printk(KERN_ALERT "Err:faile in scull_class!\n"); + return -1; + } + device_create(scull_class, NULL, MKDEV(ret,0), NULL, DEVICE_NAME); + + + //--------------------------- + gpio_i2c_scl = of_get_named_gpio_flags(node, "i2c_scl", 0, &flags); + if (gpio_is_valid(gpio_i2c_scl)){ + if (gpio_request(gpio_i2c_scl, "i2c_scl_gpio")<0) { + printk("%s: failed to get gpio_i2c_scl.\n", __func__); + return -1; + } + gpio_direction_output(gpio_i2c_scl, 1); + printk("%s: get property: gpio,i2c_scl = %d\n", __func__, gpio_i2c_scl); + }else{ + printk("get property gpio,i2c vk2c21 failed \n"); + return -1; + } + + gpio_i2c_sda = of_get_named_gpio_flags(node, "i2c_sda", 0, &flags); + + if (gpio_is_valid(gpio_i2c_sda)){ + if (gpio_request(gpio_i2c_sda, "i2c_sda_gpio")<0) { + printk("%s: failed to get gpio_i2c_sda.\n", __func__); + return -1; + } + gpio_direction_output(gpio_i2c_sda, 1); + printk("%s: get property: gpio,i2c_sda = %d\n", __func__, gpio_i2c_sda); + }else{ + printk("get property gpio,i2c vk2c21 failed \n"); + return -1; + } + + printk("==========%s probe ok========\n", DEVICE_NAME); + + ret = Vk2c21_Init(); + if(ret < 0) + return -1; + + + return 0; +} + +static int Vk2c21_remove(struct platform_device *pdev) +{ + unregister_chrdev(0,DEVICE_NAME); + return 0; +} + + +static void Vk2c21_shutdown (struct platform_device *pdev) +{ + WriteCmdVk2c21(Vk2c21_SYSSET,SYSOFF_LCDOFF); +} + +#ifdef CONFIG_OF +static const struct of_device_id Vk2c21_dt_match[]={ + { .compatible = "lcd_vk2c21",}, + {} +}; +MODULE_DEVICE_TABLE(of, Vk2c21_dt_match); +#endif + +static struct platform_driver Vk2c21_driver = { + .probe = Vk2c21_probe, + .remove = Vk2c21_remove, + .shutdown = Vk2c21_shutdown, + .driver = { + .name = DEVICE_NAME, + .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = of_match_ptr(Vk2c21_dt_match), +#endif + }, +}; + + +static int __init led_vk2c21_init(void) +{ + int ret; + DBG_PRINT("%s\n=============================================\n", __FUNCTION__); + ret = platform_driver_register(&Vk2c21_driver); + if (ret) { + printk("[error] %s failed to register vk2c21 driver module\n", __FUNCTION__); + return -ENODEV; + } + return ret; +} + +static void __exit led_vk2c21_exit(void) +{ + platform_driver_unregister(&Vk2c21_driver); +} + +module_init(led_vk2c21_init); +module_exit(led_vk2c21_exit); + +MODULE_AUTHOR("Hugsun"); +MODULE_DESCRIPTION("LCD Extern driver for lcd_vk2c21"); +MODULE_LICENSE("GPL"); diff --git a/drivers/char/lcd_vk2c21.h b/drivers/char/lcd_vk2c21.h new file mode 100644 index 0000000000000..ac6dd04442474 --- /dev/null +++ b/drivers/char/lcd_vk2c21.h @@ -0,0 +1,63 @@ +#ifndef __LCD_VK2C21_H__ +#define __LCD_VK2C21_H__ + +#define Vk2c21_ADDR 0x70 // IIC地址 +//基本设置 +#define Vk2c21_RWRAM 0x80 // 读写显示RAM +#define Vk2c21_MODESET 0x82 // BIAS,COM设置 +#define CCOM_1_3__4 0x00 // 1/3bias 4com +#define CCOM_1_4__4 0x01 // 1/4bias 4com +#define CCOM_1_3__8 0x02 // 1/3bias 8com +#define CCOM_1_4__8 0x03 // 1/4bias 8com +#define Vk2c21_SYSSET 0x84 // IRC,LCD开关设置 +#define SYSOFF_LCDOFF 0x00 // IRC off,LCD off +#define SYSON_LCDOFF 0x02 // IRC on,LCD off +#define SYSON_LCDON 0x03 // IRC on,LCD on +#define Vk2c21_FRAMESET 0x86 // 帧频设置 +#define FRAME_80HZ 0x00 // 帧频80HZ +#define FRAME_160HZ 0x01 // 帧频160HZ +#define Vk2c21_BLINKSET 0x88 // 闪烁频率设置 +#define BLINK_OFF 0x00 // 闪烁关闭 +#define BLINK_2HZ 0x01 // 闪烁2HZ +#define BLINK_1HZ 0x02 // 闪烁1HZ +#define BLINK_0D5HZ 0x03 // 闪烁0.5HZ +#define Vk2c21_IVASET 0x8A // SEG/VLCD共用脚设置和内部电压调整设置 +#define VLCDSEL_IVAOFF_R0 0x00 // SEG/VLCD共用脚设为VLCD，内部电压调整功能关闭,VLCD和VDD短接VR=0偏置电压=VDD +#define VLCDSEL_IVAOFF_R1 0x0F // SEG/VLCD共用脚设为VLCD，内部电压调整功能关闭,VLCD和VDD串接电阻VR>0偏置电压=VLCD + +#define VLCDSEL_IVA00H 0x10 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=VDD 1/4bias=VDD +#define VLCDSEL_IVA01H 0x11 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.944VDD 1/4bias=0.957VDD +#define VLCDSEL_IVA02H 0x12 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.894VDD 1/4bias=0.918VDD +#define VLCDSEL_IVA03H 0x13 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.849VDD 1/4bias=0.882VDD +#define VLCDSEL_IVA04H 0x14 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.808VDD 1/4bias=0.849VDD +#define VLCDSEL_IVA05H 0x15 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.771VDD 1/4bias=0.818VDD +#define VLCDSEL_IVA06H 0x16 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.738VDD 1/4bias=0.789VDD +#define VLCDSEL_IVA07H 0x17 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.707VDD 1/4bias=0.763VDD +#define VLCDSEL_IVA08H 0x18 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.678VDD 1/4bias=0.738VDD +#define VLCDSEL_IVA09H 0x19 // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.652VDD 1/4bias=0.714VDD +#define VLCDSEL_IVA0AH 0x1A // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.628VDD 1/4bias=0.692VDD +#define VLCDSEL_IVA0BH 0x1B // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.605VDD 1/4bias=0.672VDD +#define VLCDSEL_IVA0CH 0x1C // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.584VDD 1/4bias=0.652VDD +#define VLCDSEL_IVA0DH 0x1D // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.565VDD 1/4bias=0.634VDD +#define VLCDSEL_IVA0EH 0x1E // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.547VDD 1/4bias=0.616VDD +#define VLCDSEL_IVA0FH 0x1F // SEG/VLCD共用脚设为VLCD输出，内部偏置电压调整：1/3bias=0.529VDD 1/4bias=0.600VDD + +#define SEGSEL_IVAOFF 0x20 // SEG/VLCD共用脚设为SEG，内部电压调整功能关闭,VDD提供偏置电压 +#define SEGSEL_IVA00H 0x30 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=VDD 1/4bias=VDD +#define SEGSEL_IVA01H 0x31 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.944VDD 1/4bias=0.957VDD +#define SEGSEL_IVA02H 0x32 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.894VDD 1/4bias=0.918VDD +#define SEGSEL_IVA03H 0x33 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.849VDD 1/4bias=0.882VDD +#define SEGSEL_IVA04H 0x34 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.808VDD 1/4bias=0.849VDD +#define SEGSEL_IVA05H 0x35 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.771VDD 1/4bias=0.818VDD +#define SEGSEL_IVA06H 0x36 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.738VDD 1/4bias=0.789VDD +#define SEGSEL_IVA07H 0x37 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.707VDD 1/4bias=0.763VDD +#define SEGSEL_IVA08H 0x38 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.678VDD 1/4bias=0.738VDD +#define SEGSEL_IVA09H 0x39 // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.652VDD 1/4bias=0.714VDD +#define SEGSEL_IVA0AH 0x3A // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.628VDD 1/4bias=0.692VDD +#define SEGSEL_IVA0BH 0x3B // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.605VDD 1/4bias=0.672VDD +#define SEGSEL_IVA0CH 0x3C // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.584VDD 1/4bias=0.652VDD +#define SEGSEL_IVA0DH 0x3D // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.565VDD 1/4bias=0.634VDD +#define SEGSEL_IVA0EH 0x3E // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.547VDD 1/4bias=0.616VDD +#define SEGSEL_IVA0FH 0x3F // SEG/VLCD共用脚设为SEG，内部偏置电压调整：1/3bias=0.529VDD 1/4bias=0.600VDD + +#endif