From cbbfd25e387f154a0a5884f5bdf0c95b3a24a55f Mon Sep 17 00:00:00 2001 From: Joshua-Riek Date: Sat, 14 Oct 2023 23:56:43 -0400 Subject: [PATCH] arm64: dts: turing-rk1: device tree cleanup and use correct stdout-path --- .../boot/dts/rockchip/rk3588-turing-rk1.dts | 534 +---------------- .../boot/dts/rockchip/rk3588-turing-rk1.dtsi | 544 ++++++++++++++++++ 2 files changed, 551 insertions(+), 527 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts index 4db33b0f2c65a..18662b44c1f18 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts @@ -1,538 +1,18 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Joshua Riek + * + */ /dts-v1/; -#include -#include -#include -#include -#include -#include -#include - -#include "dt-bindings/usb/pd.h" -#include "rk3588.dtsi" -#include "rk3588-rk806-single.dtsi" -#include "rk3588-linux.dtsi" +#include "rk3588-turing-rk1.dtsi" / { model = "Turing Machines RK1"; compatible = "turing,rk1", "rockchip,rk3588"; - /delete-node/ chosen; - - aliases { - mmc0 = &sdhci; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - cooling-levels = <100 160 190 200 215 235 255>; - fan-supply = <&vcc5v0_sys>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0m2_pins &fan_int>; - pwms = <&pwm0 0 50000 0>; - #cooling-cells = <2>; - rockchip,temp-trips = < - 55000 1 - 60000 2 - 65000 3 - 70000 4 - 75000 5 - 80000 6 - >; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; + chosen { + stdout-path = "serial9:115200n8"; }; - - vcc3v3_pcie30: vcc3v3-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie30_en>; - startup-delay-us = <50000>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_1v1_nldo_s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&av1d { - status = "okay"; -}; - -&av1d_mmu { - status = "okay"; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; - mem-supply = <&vdd_cpu_lit_mem_s0>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; - mem-supply = <&vdd_cpu_big0_mem_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; - mem-supply = <&vdd_cpu_big1_mem_s0>; -}; - -&gpu { - mali-supply = <&vdd_gpu_s0>; - mem-supply = <&vdd_gpu_mem_s0>; - status = "okay"; -}; - -&rknpu { - rknpu-supply = <&vdd_npu_s0>; - mem-supply = <&vdd_npu_mem_s0>; - status = "okay"; -}; - -&rknpu_mmu { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - - vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - vin-supply = <&vcc5v0_sys>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_cpu_big0_s0"; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - rockchip,suspend-voltage-selector = <1>; - regulator-boot-on; - regulator-always-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { - compatible = "rockchip,rk8603"; - reg = <0x43>; - vin-supply = <&vcc5v0_sys>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_cpu_big1_s0"; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - rockchip,suspend-voltage-selector = <1>; - regulator-boot-on; - regulator-always-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1m2_xfer>; - status = "okay"; - - vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - vin-supply = <&vcc5v0_sys>; - regulator-compatible = "rk860x-reg"; - regulator-name = "vdd_npu_s0"; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - rockchip,suspend-voltage-selector = <1>; - regulator-boot-on; - regulator-always-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c6 { - status = "okay"; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - interrupt-parent = <&gpio0>; - interrupts = ; - wakeup-source; - }; -}; - -&iep { - status = "okay"; -}; - -&iep_mmu { - status = "okay"; -}; - -&jpegd { - status = "okay"; -}; - -&jpegd_mmu { - status = "okay"; -}; - -&jpege_ccu { - status = "okay"; -}; - -&jpege0 { - status = "okay"; -}; - -&jpege0_mmu { - status = "okay"; -}; - -&jpege1 { - status = "okay"; -}; - -&jpege1_mmu { - status = "okay"; -}; - -&jpege2 { - status = "okay"; -}; - -&jpege2_mmu { - status = "okay"; -}; - -&jpege3 { - status = "okay"; -}; - -&jpege3_mmu { - status = "okay"; -}; - -&vdpu { - status = "okay"; -}; - -&vdpu_mmu { - status = "okay"; -}; - -&mpp_srv { - status = "okay"; -}; - -&rga3_core0 { - status = "okay"; -}; - -&rga3_0_mmu { - status = "okay"; -}; - -&rga3_core1 { - status = "okay"; -}; - -&rga3_1_mmu { - status = "okay"; -}; - -&rga2 { - status = "okay"; -}; - -&rkvdec_ccu { - status = "okay"; -}; - -&rkvdec0 { - status = "okay"; -}; - -&rkvdec0_mmu { - status = "okay"; -}; - -&rkvdec1 { - status = "okay"; -}; - -&rkvdec1_mmu { - status = "okay"; -}; - -&rkvenc_ccu { - status = "okay"; -}; - -&rkvenc0 { - status = "okay"; -}; - -&rkvenc0_mmu { - status = "okay"; -}; - -&rkvenc1 { - status = "okay"; -}; - -&rkvenc1_mmu { - status = "okay"; -}; - -&saradc { - status = "okay"; - vref-supply = <&vcc_1v8_s0>; -}; - -&tsadc { - status = "okay"; -}; - -&gmac1 { - status = "okay"; - phy-mode = "rgmii-rxid"; - clock_in_out = "output"; - - snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1_miim - &gmac1_tx_bus2 - &gmac1_rx_bus2 - &gmac1_rgmii_clk - &gmac1_rgmii_bus>; - - rx_delay = <0x00>; - tx_delay = <0x43>; - - phy-handle = <&rgmii_phy1>; -}; - -&mdio1 { - rgmii_phy1: phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - }; -}; - -&combphy2_psu { - status = "okay"; -}; - -&pcie2x1l1 { - linux,pci-domain = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_reset>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x4 { - linux,pci-domain = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3_reset>, <&pcie3_clkreqn_m1>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; -}; - -&pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - fan { - fan_int: fan-int { - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie2 { - pcie2_reset: pcie2-reset { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie3 { - pcie3_reset: pcie3-reset { - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie3_clkreqn_m1: pcie3-clkreqn-m1 { - rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - vcc3v3_pcie30_en: pcie3-reg { - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - no-sdio; - no-sd; - non-removable; - max-frequency = <200000000>; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - full-pwr-cycle-in-suspend; - status = "okay"; -}; - -&hdmi0 { - status = "okay"; -}; - -&hdmi0_in_vp0 { - status = "okay"; -}; - -&hdmi0_in_vp1 { - status = "disabled"; -}; - -&hdmi0_in_vp2 { - status = "disabled"; -}; - -&hdptxphy_hdmi0 { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vepu { - status = "okay"; -}; - -&vop { - status = "okay"; - assigned-clocks = <&cru ACLK_VOP>; - assigned-clock-rates = <800000000>; -}; - -&route_hdmi0 { - status = "okay"; - connect = <&vp0_out_hdmi0>; - /delete-property/ force-output; - /delete-node/ force_timing; -}; - -&vp0 { - rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; - rockchip,primary-plane = ; - cursor-win-id = ; -}; - -&vp1 { - rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; - rockchip,primary-plane = ; - cursor-win-id = ; -}; - -&vp2 { - rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; - rockchip,primary-plane = ; - cursor-win-id = ; -}; - -&vp3 { - rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; - rockchip,primary-plane = ; - cursor-win-id = ; -}; - -&display_subsystem { - clocks = <&hdptxphy_hdmi_clk0>; - clock-names = "hdmi0_phy_pll"; -}; - -&hdptxphy_hdmi_clk0 { - status = "okay"; -}; - -&uart9 { - pinctrl-0 = <&uart9m0_xfer>; - status = "okay"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_otg { - status = "okay"; -}; - -&usbdp_phy0 { - status = "okay"; -}; - -&usbdp_phy0_u3 { - status = "okay"; -}; - -&usbdrd3_0 { - status = "okay"; -}; - -&usbdrd_dwc3_0 { - status = "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi new file mode 100644 index 0000000000000..f0c75122c9cbb --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi @@ -0,0 +1,544 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Joshua Riek + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include + +#include "dt-bindings/usb/pd.h" +#include "rk3588.dtsi" +#include "rk3588-rk806-single.dtsi" +#include "rk3588-linux.dtsi" + +/ { + compatible = "turing,rk1", "rockchip,rk3588"; + + /delete-node/ chosen; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdhci; + serial2 = &uart2; + serial9 = &uart9; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + cooling-levels = <100 160 190 200 215 235 255>; + fan-supply = <&vcc5v0_sys>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0m2_pins &fan_int>; + pwms = <&pwm0 0 50000 0>; + #cooling-cells = <2>; + rockchip,temp-trips = < + 55000 1 + 60000 2 + 65000 3 + 70000 4 + 75000 5 + 80000 6 + >; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc3v3_pcie30: vcc3v3-pcie30-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie30_en>; + startup-delay-us = <50000>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&av1d { + status = "okay"; +}; + +&av1d_mmu { + status = "okay"; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; + mem-supply = <&vdd_cpu_big0_mem_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; + mem-supply = <&vdd_cpu_big1_mem_s0>; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + mem-supply = <&vdd_gpu_mem_s0>; + status = "okay"; +}; + +&rknpu { + rknpu-supply = <&vdd_npu_s0>; + mem-supply = <&vdd_npu_mem_s0>; + status = "okay"; +}; + +&rknpu_mmu { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + + vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big0_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { + compatible = "rockchip,rk8603"; + reg = <0x43>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_cpu_big1_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; + status = "okay"; + + vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "rk860x-reg"; + regulator-name = "vdd_npu_s0"; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + rockchip,suspend-voltage-selector = <1>; + regulator-boot-on; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + interrupt-parent = <&gpio0>; + interrupts = ; + wakeup-source; + }; +}; + +&iep { + status = "okay"; +}; + +&iep_mmu { + status = "okay"; +}; + +&jpegd { + status = "okay"; +}; + +&jpegd_mmu { + status = "okay"; +}; + +&jpege_ccu { + status = "okay"; +}; + +&jpege0 { + status = "okay"; +}; + +&jpege0_mmu { + status = "okay"; +}; + +&jpege1 { + status = "okay"; +}; + +&jpege1_mmu { + status = "okay"; +}; + +&jpege2 { + status = "okay"; +}; + +&jpege2_mmu { + status = "okay"; +}; + +&jpege3 { + status = "okay"; +}; + +&jpege3_mmu { + status = "okay"; +}; + +&vdpu { + status = "okay"; +}; + +&vdpu_mmu { + status = "okay"; +}; + +&mpp_srv { + status = "okay"; +}; + +&rga3_core0 { + status = "okay"; +}; + +&rga3_0_mmu { + status = "okay"; +}; + +&rga3_core1 { + status = "okay"; +}; + +&rga3_1_mmu { + status = "okay"; +}; + +&rga2 { + status = "okay"; +}; + +&rkvdec_ccu { + status = "okay"; +}; + +&rkvdec0 { + status = "okay"; +}; + +&rkvdec0_mmu { + status = "okay"; +}; + +&rkvdec1 { + status = "okay"; +}; + +&rkvdec1_mmu { + status = "okay"; +}; + +&rkvenc_ccu { + status = "okay"; +}; + +&rkvenc0 { + status = "okay"; +}; + +&rkvenc0_mmu { + status = "okay"; +}; + +&rkvenc1 { + status = "okay"; +}; + +&rkvenc1_mmu { + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8_s0>; +}; + +&tsadc { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + phy-mode = "rgmii-rxid"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; + + rx_delay = <0x00>; + tx_delay = <0x43>; + + phy-handle = <&rgmii_phy1>; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&combphy2_psu { + status = "okay"; +}; + +&pcie2x1l1 { + linux,pci-domain = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_reset>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + linux,pci-domain = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie3_reset>, <&pcie3_clkreqn_m1>; + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&pinctrl { + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fan { + fan_int: fan-int { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie2 { + pcie2_reset: pcie2-reset { + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie3 { + pcie3_reset: pcie3-reset { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie3_clkreqn_m1: pcie3-clkreqn-m1 { + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vcc3v3_pcie30_en: pcie3-reg { + rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + full-pwr-cycle-in-suspend; + status = "okay"; +}; + +&hdmi0 { + status = "okay"; +}; + +&hdmi0_in_vp0 { + status = "okay"; +}; + +&hdmi0_in_vp1 { + status = "disabled"; +}; + +&hdmi0_in_vp2 { + status = "disabled"; +}; + +&hdptxphy_hdmi0 { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vepu { + status = "okay"; +}; + +&vop { + status = "okay"; + assigned-clocks = <&cru ACLK_VOP>; + assigned-clock-rates = <800000000>; +}; + +&route_hdmi0 { + status = "okay"; + connect = <&vp0_out_hdmi0>; + /delete-property/ force-output; + /delete-node/ force_timing; +}; + +&vp0 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; + rockchip,primary-plane = ; + cursor-win-id = ; +}; + +&vp1 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; + rockchip,primary-plane = ; + cursor-win-id = ; +}; + +&vp2 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; + rockchip,primary-plane = ; + cursor-win-id = ; +}; + +&vp3 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; + rockchip,primary-plane = ; + cursor-win-id = ; +}; + +&display_subsystem { + clocks = <&hdptxphy_hdmi_clk0>; + clock-names = "hdmi0_phy_pll"; +}; + +&hdptxphy_hdmi_clk0 { + status = "okay"; +}; + +&uart9 { + pinctrl-0 = <&uart9m0_xfer>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdp_phy0 { + status = "okay"; +}; + +&usbdp_phy0_u3 { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; +};