From ef933e875b20ebceebeb062d9d583b1b8e12cee0 Mon Sep 17 00:00:00 2001 From: Heisath Date: Tue, 30 Jan 2024 19:56:28 +0100 Subject: [PATCH 1/2] Add mvebu 6.7 patches, move to rmk tree --- config/kernel/linux-mvebu-edge.config | 9 +- config/sources/families/mvebu.conf | 6 + .../09-pci-link-retraining.patch.disabled | 219 ++++++++++ .../mvebu-6.7/10-fix-dsa-debugfs.patch | 35 ++ .../91-01-libata-add-ledtrig-support.patch | 136 ++++++ .../91-02-Enable-ATA-port-LED-trigger.patch | 30 ++ ...-mvebu-gpio-add_wake_on_gpio_support.patch | 88 ++++ ...io-remove-hardcoded-timer-assignment.patch | 411 ++++++++++++++++++ ...-helios4-dts-add-wake-on-lan-support.patch | 21 + .../compile-dtb-with-symbol-support.patch | 12 + ...s-disable-spi-flash-on-a388-microsom.patch | 10 + ..._DMA_block_memory_allocation_to_2048.patch | 11 + ...lock_atheros_regulatory_restrictions.patch | 70 +++ 13 files changed, 1057 insertions(+), 1 deletion(-) create mode 100644 patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled create mode 100644 patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch create mode 100644 patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch create mode 100644 patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch create mode 100644 patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch create mode 100644 patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch create mode 100644 patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch create mode 100644 patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch create mode 100644 patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch create mode 100644 patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch create mode 100644 patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch diff --git a/config/kernel/linux-mvebu-edge.config b/config/kernel/linux-mvebu-edge.config index f59cc3d5ffef..62f11f18d74f 100644 --- a/config/kernel/linux-mvebu-edge.config +++ b/config/kernel/linux-mvebu-edge.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.7.0-rc8 Kernel Configuration +# Linux/arm 6.7.0 Kernel Configuration # CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" CONFIG_CC_IS_GCC=y @@ -11,6 +11,8 @@ CONFIG_AS_VERSION=23800 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=23800 CONFIG_LLD_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_CC_HAS_ASM_INLINE=y @@ -2371,6 +2373,8 @@ CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y +CONFIG_ARCH_WANT_LIBATA_LEDS=y +CONFIG_ATA_LEDS=y CONFIG_SATA_PMP=y # @@ -2677,6 +2681,7 @@ CONFIG_MV643XX_ETH=y CONFIG_MVMDIO=y CONFIG_MVNETA_BM_ENABLE=y CONFIG_MVNETA=y +CONFIG_MVGMAC=y CONFIG_MVNETA_BM=y CONFIG_MVPP2=y # CONFIG_SKGE is not set @@ -7820,3 +7825,5 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking +# CONFIG_DEBUG_INFO is not set +# CONFIG_GDB_SCRIPTS is not set diff --git a/config/sources/families/mvebu.conf b/config/sources/families/mvebu.conf index a969f3a03e8c..f165e7809a4f 100644 --- a/config/sources/families/mvebu.conf +++ b/config/sources/families/mvebu.conf @@ -30,6 +30,12 @@ case $BRANCH in edge) declare -g KERNEL_MAJOR_MINOR="6.7" # Major and minor versions of this kernel. + declare -g KERNEL_SKIP_MAKEFILE_VERSION="yes" # Armbian patches change the version here, so no use having it in the version string. + + declare -g KERNELSOURCE="git://git.armlinux.org.uk/~rmk/linux-arm.git" + declare -g KERNELBRANCH="branch:clearfog" + declare -g KERNELDIR="linux-clearfog" + ;; esac diff --git a/patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled b/patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled new file mode 100644 index 000000000000..e04e8e17a6ba --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled @@ -0,0 +1,219 @@ +Subject: [PATCH v3] PCI: Disallow retraining link for Atheros chips on non-Gen1 PCIe bridges +Atheros AR9xxx and QCA9xxx chips have behaviour issues not only after a +bus reset, but also after doing retrain link, if PCIe bridge is not in +GEN1 mode (at 2.5 GT/s speed): + +- QCA9880 and QCA9890 chips throw a Link Down event and completely + disappear from the bus and their config space is not accessible + afterwards. + +- QCA9377 chip throws a Link Down event followed by Link Up event, the + config space is accessible and PCI device ID is correct. But trying to + access chip's I/O space causes Uncorrected (Non-Fatal) AER error, + followed by Synchronous external abort 96000210 and Segmentation fault + of insmod while loading ath10k_pci.ko module. + +- AR9390 chip throws a Link Down event followed by Link Up event, config + space is accessible, but contains nonsense values. PCI device ID is + 0xABCD which indicates HW bug that chip itself was not able to read + values from internal EEPROM/OTP. + +- AR9287 chip throws also Link Down and Link Up events, also has + accessible config space containing correct values. But ath9k driver + fails to initialize card from this state as it is unable to access HW + registers. This also indicates that the chip iself is not able to read + values from internal EEPROM/OTP. + +These issues related to PCI device ID 0xABCD and to reading internal +EEPROM/OTP were previously discussed at ath9k-devel mailing list in +following thread: + + https://www.mail-archive.com/ath9k-devel@lists.ath9k.org/msg07529.html + +After experiments we've come up with a solution: it seems that Retrain +link can be called only when using GEN1 PCIe bridge or when PCIe bridge +link speed is forced to 2.5 GT/s. Applying this workaround fixes all +mentioned cards. + +This issue was reproduced with more cards: +- Compex WLE900VX (QCA9880 based / device ID 0x003c) +- QCNFA435 (QCA9377 based / device ID 0x0042) +- Compex WLE200NX (AR9287 based / device ID 0x002e) +- "noname" card (QCA9890 based / device ID 0x003c) +- Wistron NKR-DNXAH1 (AR9390 based / device ID 0x0030) +on Armada 385 with pci-mvebu.c driver and also on Armada 3720 with +pci-aardvark.c driver. + +To workaround this issue, this change introduces a new PCI quirk called +PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1, which is enabled for all +Atheros chips with PCI_DEV_FLAGS_NO_BUS_RESET quirk, and also for Atheros +chip AR9287. + +When this quirk is set, kernel disallows triggering PCI_EXP_LNKCTL_RL +bit in config space of PCIe Bridge in the case when PCIe Bridge is +capable of higher speed than 2.5 GT/s and this higher speed is already +allowed. When PCIe Bridge has accessible LNKCTL2 register, we try to +force target link speed to 2.5 GT/s. After this change it is possible +to trigger PCI_EXP_LNKCTL_RL bit without issues. + +Currently only PCIe ASPM kernel code triggers this PCI_EXP_LNKCTL_RL bit, +so quirk check is added only into pcie/aspm.c file. + +Signed-off-by: Pali Rohár +Reported-by: Toke Høiland-Jørgensen +Tested-by: Toke Høiland-Jørgensen +Tested-by: Marek Behún +BugLink: https://lore.kernel.org/linux-pci/87h7l8axqp.fsf@toke.dk/ +BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=84821 +BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=192441 +BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=209833 +Cc: stable@vger.kernel.org # c80851f6ce63a ("PCI: Add PCI_EXP_LNKCTL2_TLS* macros") + +--- +Changes since v1: +* Move whole quirk code into pcie_downgrade_link_to_gen1() function +* Reformat to 80 chars per line where possible +* Add quirk also for cards with AR9287 chip (PCI ID 0x002e) +* Extend commit message description and add information about 0xABCD + +Changes since v2: +* Add quirk also for Atheros QCA9377 chip +--- + drivers/pci/pcie/aspm.c | 44 +++++++++++++++++++++++++++++++++++++++++ + drivers/pci/quirks.c | 39 ++++++++++++++++++++++++++++-------- + include/linux/pci.h | 2 ++ + 3 files changed, 77 insertions(+), 8 deletions(-) + +diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c +index ac0557a305af..729b0389562b 100644 +--- a/drivers/pci/pcie/aspm.c ++++ b/drivers/pci/pcie/aspm.c +@@ -192,12 +192,56 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) + link->clkpm_disable = blacklist ? 1 : 0; + } + ++static int pcie_downgrade_link_to_gen1(struct pci_dev *parent) ++{ ++ u16 reg16; ++ u32 reg32; ++ int ret; ++ ++ /* Check if link is capable of higher speed than 2.5 GT/s */ ++ pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, ®32); ++ if ((reg32 & PCI_EXP_LNKCAP_SLS) <= PCI_EXP_LNKCAP_SLS_2_5GB) ++ return 0; ++ ++ /* Check if link speed can be downgraded to 2.5 GT/s */ ++ pcie_capability_read_dword(parent, PCI_EXP_LNKCAP2, ®32); ++ if (!(reg32 & PCI_EXP_LNKCAP2_SLS_2_5GB)) { ++ pci_err(parent, "ASPM: Bridge does not support changing Link Speed to 2.5 GT/s\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ /* Force link speed to 2.5 GT/s */ ++ ret = pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL2, ++ PCI_EXP_LNKCTL2_TLS, ++ PCI_EXP_LNKCTL2_TLS_2_5GT); ++ if (!ret) { ++ /* Verify that new value was really set */ ++ pcie_capability_read_word(parent, PCI_EXP_LNKCTL2, ®16); ++ if ((reg16 & PCI_EXP_LNKCTL2_TLS) != PCI_EXP_LNKCTL2_TLS_2_5GT) ++ ret = -EINVAL; ++ } ++ ++ if (ret) { ++ pci_err(parent, "ASPM: Changing Target Link Speed to 2.5 GT/s failed: %d\n", ret); ++ return ret; ++ } ++ ++ pci_info(parent, "ASPM: Target Link Speed changed to 2.5 GT/s due to quirk\n"); ++ return 0; ++} ++ + static int pcie_retrain_link(struct pcie_link_state *link) + { + struct pci_dev *parent = link->pdev; + int rc; + u16 reg16; + ++ if ((link->downstream->dev_flags & PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1) && ++ pcie_downgrade_link_to_gen1(parent)) { ++ pci_err(parent, "ASPM: Retrain Link at higher speed is disallowed by quirk\n"); ++ return false; ++ } ++ + /* + * Ensure the updated LNKCTL parameters are used during link + * training by checking that there is no ongoing link training to +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 5d2acebc3..91d675e0d 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3572,19 +3572,46 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev) + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, + quirk_nvidia_no_bus_reset); + ++ ++static void quirk_no_bus_reset_and_no_retrain_link(struct pci_dev *dev) ++{ ++ dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET | ++ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1; ++} ++ + /* + * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset. ++ * Atheros AR9xxx and QCA9xxx chips do not behave after a bus reset and also ++ * after retrain link when PCIe bridge is not in GEN1 mode at 2.5 GT/s speed. + * The device will throw a Link Down error on AER-capable systems and + * regardless of AER, config space of the device is never accessible again + * and typically causes the system to hang or reset when access is attempted. ++ * Or if config space is accessible again then it contains only dummy values ++ * like fixed PCI device ID 0xABCD or values not initialized at all. ++ * Retrain link can be called only when using GEN1 PCIe bridge or when ++ * PCIe bridge has forced link speed to 2.5 GT/s via PCI_EXP_LNKCTL2 register. ++ * To reset these cards it is required to do PCIe Warm Reset via PERST# pin. + * https://lore.kernel.org/r/20140923210318.498dacbd@dualc.maya.org/ ++ * https://lore.kernel.org/r/87h7l8axqp.fsf@toke.dk/ ++ * https://www.mail-archive.com/ath9k-devel@lists.ath9k.org/msg07529.html + */ +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); +-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x002e, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, ++ quirk_no_bus_reset_and_no_retrain_link); ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0042, ++ quirk_no_bus_reset_and_no_retrain_link); ++ + + /* + * Root port on some Cavium CN8xxx chips do not successfully complete a bus +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 86c799c97b77..fdbf7254e4ab 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -227,6 +227,8 @@ enum pci_dev_flags { + PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11), + /* Device does honor MSI masking despite saying otherwise */ + PCI_DEV_FLAGS_HAS_MSI_MASKING = (__force pci_dev_flags_t) (1 << 12), ++ /* Don't Retrain Link for device when bridge is not in GEN1 mode */ ++ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1 = (__force pci_dev_flags_t) (1 << 12), + }; + + enum pci_irq_reroute_variant { +-- +2.20.1 diff --git a/patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch b/patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch new file mode 100644 index 000000000000..5a7b8a5990fe --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch @@ -0,0 +1,35 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Tue, 30 Jan 2024 19:44:13 +0100 +Subject: Patching kernel mvebu files + drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.cDisable dsa-port slave print + +Signed-off-by: John Doe +--- + drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c b/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c +index 4005a4760884..a5cba5a2965a 100644 +--- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c ++++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c +@@ -218,14 +218,14 @@ static int mv88e6xxx_name_show(struct seq_file *s, void *p) + i = dp->index; + if (!ds->cd->port_names[i]) + continue; + + seq_printf(s, "%4d %s", i, ds->cd->port_names[i]); +- ++#if 0 + if (dp->slave) + seq_printf(s, " (%s)", netdev_name(dp->slave)); +- ++#endif + seq_puts(s, "\n"); + } + + return 0; + } +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch b/patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch new file mode 100644 index 000000000000..983ccb75076a --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch @@ -0,0 +1,136 @@ +Index: 6.1__mvebu__armhf/drivers/ata/Kconfig +=================================================================== +--- 6.1__mvebu__armhf.orig/drivers/ata/Kconfig ++++ 6.1__mvebu__armhf/drivers/ata/Kconfig +@@ -67,6 +67,22 @@ config ATA_FORCE + + If unsure, say Y. + ++config ARCH_WANT_LIBATA_LEDS ++ bool ++ ++config ATA_LEDS ++ bool "support ATA port LED triggers" ++ depends on ARCH_WANT_LIBATA_LEDS ++ select NEW_LEDS ++ select LEDS_CLASS ++ select LEDS_TRIGGERS ++ default y ++ help ++ This option adds a LED trigger for each registered ATA port. ++ It is used to drive disk activity leds connected via GPIO. ++ ++ If unsure, say N. ++ + config ATA_ACPI + bool "ATA ACPI Support" + depends on ACPI +Index: 6.1__mvebu__armhf/drivers/ata/libata-core.c +=================================================================== +--- 6.1__mvebu__armhf.orig/drivers/ata/libata-core.c ++++ 6.1__mvebu__armhf/drivers/ata/libata-core.c +@@ -663,6 +663,19 @@ u64 ata_tf_read_block(const struct ata_t + return block; + } + ++#ifdef CONFIG_ATA_LEDS ++#define LIBATA_BLINK_DELAY 20 /* ms */ ++static inline void ata_led_act(struct ata_port *ap) ++{ ++ unsigned long led_delay = LIBATA_BLINK_DELAY; ++ ++ if (unlikely(!ap->ledtrig)) ++ return; ++ ++ led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0); ++} ++#endif ++ + /** + * ata_build_rw_tf - Build ATA taskfile for given read/write request + * @qc: Metadata associated with the taskfile to build +@@ -4813,6 +4826,10 @@ void ata_qc_issue(struct ata_queued_cmd + struct ata_link *link = qc->dev->link; + u8 prot = qc->tf.protocol; + ++#ifdef CONFIG_ATA_LEDS ++ ata_led_act(ap); ++#endif ++ + /* Make sure only one non-NCQ command is outstanding. */ + WARN_ON_ONCE(ata_tag_valid(link->active_tag)); + +@@ -5328,6 +5345,9 @@ struct ata_port *ata_port_alloc(struct a + ap->stats.unhandled_irq = 1; + ap->stats.idle_irq = 1; + #endif ++#ifdef CONFIG_ATA_LEDS ++ ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL); ++#endif + ata_sff_port_init(ap); + + return ap; +@@ -5363,6 +5383,12 @@ static void ata_host_release(struct kref + + kfree(ap->slave_link); + kfree(ap->ncq_sense_buf); ++#ifdef CONFIG_ATA_LEDS ++ if (ap->ledtrig) { ++ led_trigger_unregister(ap->ledtrig); ++ kfree(ap->ledtrig); ++ }; ++#endif + kfree(ap); + host->ports[i] = NULL; + } +@@ -5765,7 +5791,23 @@ int ata_host_register(struct ata_host *h + host->ports[i]->print_id = atomic_inc_return(&ata_print_id); + host->ports[i]->local_port_no = i + 1; + } ++#ifdef CONFIG_ATA_LEDS ++ for (i = 0; i < host->n_ports; i++) { ++ if (unlikely(!host->ports[i]->ledtrig)) ++ continue; + ++ snprintf(host->ports[i]->ledtrig_name, ++ sizeof(host->ports[i]->ledtrig_name), "ata%u", ++ host->ports[i]->print_id); ++ ++ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; ++ ++ if (led_trigger_register(host->ports[i]->ledtrig)) { ++ kfree(host->ports[i]->ledtrig); ++ host->ports[i]->ledtrig = NULL; ++ } ++ } ++#endif + /* Create associated sysfs transport objects */ + for (i = 0; i < host->n_ports; i++) { + rc = ata_tport_add(host->dev,host->ports[i]); +Index: 6.1__mvebu__armhf/include/linux/libata.h +=================================================================== +--- 6.1__mvebu__armhf.orig/include/linux/libata.h ++++ 6.1__mvebu__armhf/include/linux/libata.h +@@ -23,6 +23,9 @@ + #include + #include + #include ++#ifdef CONFIG_ATA_LEDS ++#include ++#endif + + /* + * Define if arch has non-standard setup. This is a _PCI_ standard +@@ -857,6 +860,12 @@ struct ata_port { + #ifdef CONFIG_ATA_ACPI + struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ + #endif ++ ++#ifdef CONFIG_ATA_LEDS ++ struct led_trigger *ledtrig; ++ char ledtrig_name[8]; ++#endif ++ + /* owned by EH */ + u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; + }; diff --git a/patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch b/patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch new file mode 100644 index 000000000000..10680f98cb84 --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch @@ -0,0 +1,30 @@ +From 9ee6345ef82f7af5f98e17a40e667f8ad6b2fa1b Mon Sep 17 00:00:00 2001 +From: aprayoga +Date: Sun, 3 Sep 2017 18:10:12 +0800 +Subject: Enable ATA port LED trigger + +--- + arch/arm/configs/mvebu_v7_defconfig | 1 + + arch/arm/mach-mvebu/Kconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/mvebu_v7_defconfig ++++ b/arch/arm/configs/mvebu_v7_defconfig +@@ -58,6 +58,7 @@ CONFIG_MTD_UBI=y + CONFIG_EEPROM_AT24=y + CONFIG_BLK_DEV_SD=y + CONFIG_ATA=y ++CONFIG_ATA_LEDS=y + CONFIG_SATA_AHCI=y + CONFIG_AHCI_MVEBU=y + CONFIG_SATA_MV=y +--- a/arch/arm/mach-mvebu/Kconfig ++++ b/arch/arm/mach-mvebu/Kconfig +@@ -56,6 +56,7 @@ config MACH_ARMADA_375 + config MACH_ARMADA_38X + bool "Marvell Armada 380/385 boards" + depends on ARCH_MULTI_V7 ++ select ARCH_WANT_LIBATA_LEDS + select ARM_ERRATA_720789 + select PL310_ERRATA_753970 + select ARM_GIC diff --git a/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch b/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch new file mode 100644 index 000000000000..9274f2b1a1d7 --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch @@ -0,0 +1,88 @@ +--- a/drivers/gpio/gpio-mvebu.c ++++ b/drivers/gpio/gpio-mvebu.c +@@ -40,6 +40,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -111,7 +112,7 @@ struct mvebu_gpio_chip { + struct regmap *regs; + u32 offset; + struct regmap *percpu_regs; +- int irqbase; ++ int bank_irq[4]; + struct irq_domain *domain; + int soc_variant; + +@@ -601,6 +602,33 @@ static void mvebu_gpio_irq_handler(struc + } + + /* ++ * Set interrupt number "irq" in the GPIO as a wake-up source. ++ * While system is running, all registered GPIO interrupts need to have ++ * wake-up enabled. When system is suspended, only selected GPIO interrupts ++ * need to have wake-up enabled. ++ * @param irq interrupt source number ++ * @param enable enable as wake-up if equal to non-zero ++ * @return This function returns 0 on success. ++ */ ++static int mvebu_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) ++{ ++ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); ++ struct mvebu_gpio_chip *mvchip = gc->private; ++ int irq; ++ int bank; ++ ++ bank = d->hwirq % 8; ++ irq = mvchip->bank_irq[bank]; ++ ++ if (enable) ++ enable_irq_wake(irq); ++ else ++ disable_irq_wake(irq); ++ ++ return 0; ++} ++ ++/* + * Functions implementing the pwm_chip methods + */ + static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) +@@ -1219,7 +1247,7 @@ static int mvebu_gpio_probe(struct platf + + err = irq_alloc_domain_generic_chips( + mvchip->domain, ngpios, 2, np->name, handle_level_irq, +- IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, 0); ++ IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, IRQ_GC_INIT_NESTED_LOCK); + if (err) { + dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", + mvchip->chip.label); +@@ -1237,6 +1265,8 @@ static int mvebu_gpio_probe(struct platf + ct->chip.irq_mask = mvebu_gpio_level_irq_mask; + ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; + ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ++ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; ++ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; + ct->chip.name = mvchip->chip.label; + + ct = &gc->chip_types[1]; +@@ -1245,6 +1275,8 @@ static int mvebu_gpio_probe(struct platf + ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; + ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; + ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ++ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; ++ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; + ct->handler = handle_edge_irq; + ct->chip.name = mvchip->chip.label; + +@@ -1260,6 +1292,7 @@ static int mvebu_gpio_probe(struct platf + continue; + irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, + mvchip); ++ mvchip->bank_irq[i] = irq; + } + + return 0; diff --git a/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch b/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch new file mode 100644 index 000000000000..c0cb9d68f96b --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch @@ -0,0 +1,411 @@ +Removes the hardcoded timer assignment of timers to pwm controllers. +This allows to use more than one pwm per gpio bank. + +Original patch with chip_data interface by Heisath + +Link: https://wiki.kobol.io/helios4/pwm/#patch-requirement +Co-developed-by: Yureka Lilian +Signed-off-by: Yureka Lilian +Signed-off-by: Finn Behrens +--- + drivers/gpio/gpio-mvebu.c | 223 ++++++++++++++++++++++++-------------- + 1 file changed, 139 insertions(+), 84 deletions(-) + +diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c +index a13f3c18ccd4..303ea3be0b69 100644 +--- a/drivers/gpio/gpio-mvebu.c ++++ b/drivers/gpio/gpio-mvebu.c +@@ -94,21 +94,43 @@ + + #define MVEBU_MAX_GPIO_PER_BANK 32 + +-struct mvebu_pwm { ++enum mvebu_pwm_ctrl { ++ MVEBU_PWM_CTRL_SET_A = 0, ++ MVEBU_PWM_CTRL_SET_B, ++ MVEBU_PWM_CTRL_MAX ++}; ++ ++struct mvebu_pwmchip { + struct regmap *regs; + u32 offset; + unsigned long clk_rate; +- struct gpio_desc *gpiod; +- struct pwm_chip chip; + spinlock_t lock; +- struct mvebu_gpio_chip *mvchip; ++ bool in_use; + + /* Used to preserve GPIO/PWM registers across suspend/resume */ +- u32 blink_select; + u32 blink_on_duration; + u32 blink_off_duration; + }; + ++struct mvebu_pwm_chip_drv { ++ enum mvebu_pwm_ctrl ctrl; ++ struct gpio_desc *gpiod; ++ bool master; ++}; ++ ++struct mvebu_pwm { ++ struct pwm_chip chip; ++ struct mvebu_gpio_chip *mvchip; ++ struct mvebu_pwmchip controller; ++ enum mvebu_pwm_ctrl default_controller; ++ ++ /* Used to preserve GPIO/PWM registers across suspend/resume */ ++ u32 blink_select; ++ struct mvebu_pwm_chip_drv drv[]; ++}; ++ ++static struct mvebu_pwmchip *mvebu_pwm_list[MVEBU_PWM_CTRL_MAX]; ++ + struct mvebu_gpio_chip { + struct gpio_chip chip; + struct regmap *regs; +@@ -285,12 +307,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) + * Functions returning offsets of individual registers for a given + * PWM controller. + */ +-static unsigned int mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *mvpwm) ++static unsigned int mvebu_pwmreg_blink_on_duration(struct mvebu_pwmchip *mvpwm) + { + return mvpwm->offset + PWM_BLINK_ON_DURATION_OFF; + } + +-static unsigned int mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *mvpwm) ++static unsigned int mvebu_pwmreg_blink_off_duration(struct mvebu_pwmchip *mvpwm) + { + return mvpwm->offset + PWM_BLINK_OFF_DURATION_OFF; + } +@@ -623,39 +645,71 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) + struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); + struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; + struct gpio_desc *desc; ++ enum mvebu_pwm_ctrl id; + unsigned long flags; + int ret = 0; ++ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; + +- spin_lock_irqsave(&mvpwm->lock, flags); ++ spin_lock_irqsave(&mvpwm->controller.lock, flags); + +- if (mvpwm->gpiod) { ++ if (drv->gpiod || (mvchip->blink_en_reg & BIT(pwm->hwpwm))) { + ret = -EBUSY; +- } else { +- desc = gpiochip_request_own_desc(&mvchip->chip, +- pwm->hwpwm, "mvebu-pwm", +- GPIO_ACTIVE_HIGH, +- GPIOD_OUT_LOW); +- if (IS_ERR(desc)) { +- ret = PTR_ERR(desc); +- goto out; +- } ++ goto out; ++ } ++ ++ desc = gpiochip_request_own_desc(&mvchip->chip, ++ pwm->hwpwm, "mvebu-pwm", ++ GPIO_ACTIVE_HIGH, ++ GPIOD_OUT_LOW); ++ if (IS_ERR(desc)) { ++ ret = PTR_ERR(desc); ++ goto out; ++ } + +- mvpwm->gpiod = desc; ++ ret = gpiod_direction_output(desc, 0); ++ if (ret) { ++ gpiochip_free_own_desc(desc); ++ goto out; + } ++ ++ for (id = MVEBU_PWM_CTRL_SET_A; id < MVEBU_PWM_CTRL_MAX; id++) { ++ if (!mvebu_pwm_list[id]->in_use) { ++ drv->ctrl = id; ++ drv->master = true; ++ mvebu_pwm_list[id]->in_use = true; ++ break; ++ } ++ } ++ ++ if (!drv->master) ++ drv->ctrl = mvpwm->default_controller; ++ ++ regmap_update_bits(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, ++ BIT(pwm->hwpwm), drv->ctrl ? BIT(pwm->hwpwm) : 0); ++ ++ drv->gpiod = desc; ++ ++ regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, ++ &mvpwm->blink_select); + out: +- spin_unlock_irqrestore(&mvpwm->lock, flags); ++ spin_unlock_irqrestore(&mvpwm->controller.lock, flags); + return ret; + } + + static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) + { + struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); ++ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; + unsigned long flags; + +- spin_lock_irqsave(&mvpwm->lock, flags); +- gpiochip_free_own_desc(mvpwm->gpiod); +- mvpwm->gpiod = NULL; +- spin_unlock_irqrestore(&mvpwm->lock, flags); ++ spin_lock_irqsave(&mvpwm->controller.lock, flags); ++ if (drv->master) ++ mvebu_pwm_list[drv->ctrl]->in_use = false; ++ ++ gpiochip_free_own_desc(drv->gpiod); ++ memset(drv, 0, sizeof(struct mvebu_pwm_chip_drv)); ++ ++ spin_unlock_irqrestore(&mvpwm->controller.lock, flags); + } + + static int mvebu_pwm_get_state(struct pwm_chip *chip, +@@ -665,28 +719,35 @@ static int mvebu_pwm_get_state(struct pwm_chip *chip, + + struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); + struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; ++ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; ++ struct mvebu_pwmchip *controller; + unsigned long long val; + unsigned long flags; + u32 u; + +- spin_lock_irqsave(&mvpwm->lock, flags); ++ if (drv->gpiod) ++ controller = mvebu_pwm_list[drv->ctrl]; ++ else ++ controller = &mvpwm->controller; ++ ++ spin_lock_irqsave(&controller->lock, flags); + +- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), &u); ++ regmap_read(controller->regs, mvebu_pwmreg_blink_on_duration(controller), &u); + /* Hardware treats zero as 2^32. See mvebu_pwm_apply(). */ + if (u > 0) + val = u; + else + val = UINT_MAX + 1ULL; + state->duty_cycle = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, +- mvpwm->clk_rate); ++ controller->clk_rate); + +- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), &u); ++ regmap_read(controller->regs, mvebu_pwmreg_blink_off_duration(controller), &u); + /* period = on + off duration */ + if (u > 0) + val += u; + else + val += UINT_MAX + 1ULL; +- state->period = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, mvpwm->clk_rate); ++ state->period = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, controller->clk_rate); + + regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &u); + if (u) +@@ -694,7 +755,7 @@ static int mvebu_pwm_get_state(struct pwm_chip *chip, + else + state->enabled = false; + +- spin_unlock_irqrestore(&mvpwm->lock, flags); ++ spin_unlock_irqrestore(&controller->lock, flags); + + return 0; + } +@@ -703,6 +764,8 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) + { + struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); ++ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; ++ struct mvebu_pwmchip *controller; + struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; + unsigned long long val; + unsigned long flags; +@@ -711,7 +774,11 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + if (state->polarity != PWM_POLARITY_NORMAL) + return -EINVAL; + +- val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle; ++ if (drv->gpiod) ++ controller = mvebu_pwm_list[drv->ctrl]; ++ else ++ controller = &mvpwm->controller; ++ val = (unsigned long long) controller->clk_rate * state->duty_cycle; + do_div(val, NSEC_PER_SEC); + if (val > UINT_MAX + 1ULL) + return -EINVAL; +@@ -726,7 +793,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + else + on = 1; + +- val = (unsigned long long) mvpwm->clk_rate * state->period; ++ val = (unsigned long long) controller->clk_rate * state->period; + do_div(val, NSEC_PER_SEC); + val -= on; + if (val > UINT_MAX + 1ULL) +@@ -738,16 +805,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + else + off = 1; + +- spin_lock_irqsave(&mvpwm->lock, flags); ++ spin_lock_irqsave(&controller->lock, flags); + +- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), on); +- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), off); ++ regmap_write(controller->regs, mvebu_pwmreg_blink_on_duration(controller), on); ++ regmap_write(controller->regs, mvebu_pwmreg_blink_off_duration(controller), off); + if (state->enabled) + mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 1); + else + mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 0); + +- spin_unlock_irqrestore(&mvpwm->lock, flags); ++ spin_unlock_irqrestore(&controller->lock, flags); + + return 0; + } +@@ -762,25 +829,27 @@ static const struct pwm_ops mvebu_pwm_ops = { + static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) + { + struct mvebu_pwm *mvpwm = mvchip->mvpwm; ++ struct mvebu_pwmchip *controller = &mvpwm->controller; + + regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, + &mvpwm->blink_select); +- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), +- &mvpwm->blink_on_duration); +- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), +- &mvpwm->blink_off_duration); ++ regmap_read(controller->regs, mvebu_pwmreg_blink_on_duration(controller), ++ &controller->blink_on_duration); ++ regmap_read(controller->regs, mvebu_pwmreg_blink_off_duration(controller), ++ &controller->blink_off_duration); + } + + static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) + { + struct mvebu_pwm *mvpwm = mvchip->mvpwm; ++ struct mvebu_pwmchip *controller = &mvpwm->controller; + + regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, + mvpwm->blink_select); +- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), +- mvpwm->blink_on_duration); +- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), +- mvpwm->blink_off_duration); ++ regmap_write(controller->regs, mvebu_pwmreg_blink_on_duration(controller), ++ controller->blink_on_duration); ++ regmap_write(controller->regs, mvebu_pwmreg_blink_off_duration(controller), ++ controller->blink_off_duration); + } + + static int mvebu_pwm_probe(struct platform_device *pdev, +@@ -792,6 +861,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, + void __iomem *base; + u32 offset; + u32 set; ++ enum mvebu_pwm_ctrl ctrl_set; + + if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { + int ret = of_property_read_u32(dev->of_node, +@@ -813,57 +883,39 @@ static int mvebu_pwm_probe(struct platform_device *pdev, + if (IS_ERR(mvchip->clk)) + return PTR_ERR(mvchip->clk); + +- mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL); ++ mvpwm = devm_kzalloc(dev, struct_size(mvpwm, drv, mvchip->chip.ngpio), GFP_KERNEL); + if (!mvpwm) + return -ENOMEM; + mvchip->mvpwm = mvpwm; + mvpwm->mvchip = mvchip; +- mvpwm->offset = offset; + +- if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { +- mvpwm->regs = mvchip->regs; ++ base = devm_platform_ioremap_resource_byname(pdev, "pwm"); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ mvpwm->controller.regs = devm_regmap_init_mmio(&pdev->dev, base, ++ &mvebu_gpio_regmap_config); ++ if (IS_ERR(mvpwm->controller.regs)) ++ return PTR_ERR(mvpwm->controller.regs); + +- switch (mvchip->offset) { +- case AP80X_GPIO0_OFF_A8K: +- case CP11X_GPIO0_OFF_A8K: +- /* Blink counter A */ +- set = 0; +- break; +- case CP11X_GPIO1_OFF_A8K: +- /* Blink counter B */ +- set = U32_MAX; +- mvpwm->offset += PWM_BLINK_COUNTER_B_OFF; +- break; +- default: +- return -EINVAL; +- } ++ /* ++ * User set A for lines of GPIO chip with id 0, B for GPIO chip ++ * with id 1. Don't allow further GPIO chips to be used for PWM. ++ */ ++ if (id == 0) { ++ set = 0; ++ ctrl_set = MVEBU_PWM_CTRL_SET_A; ++ } else if (id == 1) { ++ set = U32_MAX; ++ ctrl_set = MVEBU_PWM_CTRL_SET_B; + } else { +- base = devm_platform_ioremap_resource_byname(pdev, "pwm"); +- if (IS_ERR(base)) +- return PTR_ERR(base); +- +- mvpwm->regs = devm_regmap_init_mmio(&pdev->dev, base, +- &mvebu_gpio_regmap_config); +- if (IS_ERR(mvpwm->regs)) +- return PTR_ERR(mvpwm->regs); +- +- /* +- * Use set A for lines of GPIO chip with id 0, B for GPIO chip +- * with id 1. Don't allow further GPIO chips to be used for PWM. +- */ +- if (id == 0) +- set = 0; +- else if (id == 1) +- set = U32_MAX; +- else +- return -EINVAL; ++ return -EINVAL; + } + + regmap_write(mvchip->regs, + GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); + +- mvpwm->clk_rate = clk_get_rate(mvchip->clk); +- if (!mvpwm->clk_rate) { ++ mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk); ++ if (!mvpwm->controller.clk_rate) { + dev_err(dev, "failed to get clock rate\n"); + return -EINVAL; + } +@@ -872,7 +924,10 @@ static int mvebu_pwm_probe(struct platform_device *pdev, + mvpwm->chip.ops = &mvebu_pwm_ops; + mvpwm->chip.npwm = mvchip->chip.ngpio; + +- spin_lock_init(&mvpwm->lock); ++ spin_lock_init(&mvpwm->controller.lock); ++ ++ mvpwm->default_controller = ctrl_set; ++ mvebu_pwm_list[ctrl_set] = &mvpwm->controller; + + return devm_pwmchip_add(dev, &mvpwm->chip); + } +-- +2.43.0 + + diff --git a/patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch b/patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch new file mode 100644 index 000000000000..2b75913fda46 --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch @@ -0,0 +1,21 @@ +--- a/arch/arm/boot/dts/marvell/armada-388-helios4.dts ++++ b/arch/arm/boot/dts/marvell/armada-388-helios4.dts +@@ -84,6 +84,18 @@ + }; + }; + ++ gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <µsom_phy0_int_pins>; ++ ++ wol { ++ label = "Wake-On-LAN"; ++ linux,code = ; ++ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; ++ wakeup-source; ++ }; ++ }; ++ + io-leds { + compatible = "gpio-leds"; + sata1-led { diff --git a/patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch b/patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch new file mode 100644 index 000000000000..a2bd279ae41a --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch @@ -0,0 +1,12 @@ +--- a/scripts/Makefile.lib ++++ b/scripts/Makefile.lib +@@ -277,6 +277,9 @@ quiet_cmd_gzip = GZIP $@ + DTC ?= $(objtree)/scripts/dtc/dtc + DTC_FLAGS += -Wno-interrupt_provider + ++# Enable overlay support ++DTC_FLAGS += -@ ++ + # Disable noisy checks by default + ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),) + DTC_FLAGS += -Wno-unit_address_vs_reg \ diff --git a/patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch b/patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch new file mode 100644 index 000000000000..db5c77e0f006 --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom.dtsi ++++ b/arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom.dtsi +@@ -107,6 +107,7 @@ + compatible = "w25q32", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <3000000>; ++ status = "disabled"; + }; + }; + diff --git a/patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch b/patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch new file mode 100644 index 000000000000..eef7296e75df --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/mm/dma-mapping.c ++++ b/arch/arm/mm/dma-mapping.c +@@ -315,7 +315,7 @@ static void *__alloc_remap_buffer(struct + pgprot_t prot, struct page **ret_page, + const void *caller, bool want_vaddr); + +-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K ++#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M + static struct gen_pool *atomic_pool __ro_after_init; + + static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; diff --git a/patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch b/patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch new file mode 100644 index 000000000000..7e57c379ad88 --- /dev/null +++ b/patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch @@ -0,0 +1,70 @@ +--- a/drivers/net/wireless/ath/regd.c ++++ b/drivers/net/wireless/ath/regd.c +@@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_re + #define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\ + NL80211_RRF_NO_IR) + +-#define ATH_2GHZ_ALL ATH_2GHZ_CH01_11, \ +- ATH_2GHZ_CH12_13, \ +- ATH_2GHZ_CH14 ++#define ATH_2GHZ_ALL REG_RULE(2400, 2483, 40, 0, 30, 0) + +-#define ATH_5GHZ_ALL ATH_5GHZ_5150_5350, \ +- ATH_5GHZ_5470_5850 ++#define ATH_5GHZ_ALL REG_RULE(5140, 5860, 40, 0, 30, 0) + + /* This one skips what we call "mid band" */ + #define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \ +@@ -77,9 +74,8 @@ static const struct ieee80211_regdomain + .n_reg_rules = 4, + .alpha2 = "99", + .reg_rules = { +- ATH_2GHZ_CH01_11, +- ATH_2GHZ_CH12_13, +- ATH_5GHZ_NO_MIDBAND, ++ ATH_2GHZ_ALL, ++ ATH_5GHZ_ALL, + } + }; + +@@ -88,8 +84,8 @@ static const struct ieee80211_regdomain + .n_reg_rules = 3, + .alpha2 = "99", + .reg_rules = { +- ATH_2GHZ_CH01_11, +- ATH_5GHZ_NO_MIDBAND, ++ ATH_2GHZ_ALL, ++ ATH_5GHZ_ALL, + } + }; + +@@ -98,7 +94,7 @@ static const struct ieee80211_regdomain + .n_reg_rules = 3, + .alpha2 = "99", + .reg_rules = { +- ATH_2GHZ_CH01_11, ++ ATH_2GHZ_ALL, + ATH_5GHZ_ALL, + } + }; +@@ -108,8 +104,7 @@ static const struct ieee80211_regdomain + .n_reg_rules = 4, + .alpha2 = "99", + .reg_rules = { +- ATH_2GHZ_CH01_11, +- ATH_2GHZ_CH12_13, ++ ATH_2GHZ_ALL, + ATH_5GHZ_ALL, + } + }; +@@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center + struct ath_regulatory *reg) + + { +- if (reg->country_code == CTRY_INDIA) +- return (center_freq >= 5500 && center_freq <= 5700); +- return (center_freq >= 5260 && center_freq <= 5700); ++ return false; + } + + static void ath_force_clear_no_ir_chan(struct wiphy *wiphy, From 3426ba3b9b1e033bc57e1dff0e20492395149294 Mon Sep 17 00:00:00 2001 From: Heisath Date: Tue, 14 May 2024 18:43:06 +0200 Subject: [PATCH 2/2] Move to 6.8 --- config/kernel/linux-mvebu-edge.config | 396 ++++++++++++++++-- config/sources/families/mvebu.conf | 2 +- .../09-pci-link-retraining.patch.disabled | 0 .../10-fix-dsa-debugfs.patch | 0 .../91-01-libata-add-ledtrig-support.patch | 0 .../91-02-Enable-ATA-port-LED-trigger.patch | 0 ...-mvebu-gpio-add_wake_on_gpio_support.patch | 0 ...io-remove-hardcoded-timer-assignment.patch | 0 ...-helios4-dts-add-wake-on-lan-support.patch | 0 .../compile-dtb-with-symbol-support.patch | 0 ...s-disable-spi-flash-on-a388-microsom.patch | 0 ..._DMA_block_memory_allocation_to_2048.patch | 0 ...lock_atheros_regulatory_restrictions.patch | 0 13 files changed, 353 insertions(+), 45 deletions(-) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/09-pci-link-retraining.patch.disabled (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/10-fix-dsa-debugfs.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/91-01-libata-add-ledtrig-support.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/91-02-Enable-ATA-port-LED-trigger.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/92-mvebu-gpio-add_wake_on_gpio_support.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/94-helios4-dts-add-wake-on-lan-support.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/compile-dtb-with-symbol-support.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/dts-disable-spi-flash-on-a388-microsom.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/general-increasing_DMA_block_memory_allocation_to_2048.patch (100%) rename patch/kernel/archive/{mvebu-6.7 => mvebu-6.8}/unlock_atheros_regulatory_restrictions.patch (100%) diff --git a/config/kernel/linux-mvebu-edge.config b/config/kernel/linux-mvebu-edge.config index 64a140634213..54ae655cd8e4 100644 --- a/config/kernel/linux-mvebu-edge.config +++ b/config/kernel/linux-mvebu-edge.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.7.4 Kernel Configuration +# Linux/arm 6.8.0 Kernel Configuration # CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" CONFIG_CC_IS_GCC=y @@ -15,6 +15,7 @@ CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y +CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=125 @@ -163,8 +164,10 @@ CONFIG_GENERIC_SCHED_CLOCK=y # end of Scheduler features CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" -CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set @@ -187,6 +190,7 @@ CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y # CONFIG_CGROUP_MISC is not set +# CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y @@ -214,9 +218,10 @@ CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y -# CONFIG_EXPERT is not set +CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y @@ -235,12 +240,16 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +# CONFIG_KCMP is not set +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set +# CONFIG_KALLSYMS_ALL is not set CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y @@ -248,6 +257,7 @@ CONFIG_PERF_USE_VMALLOC=y # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters CONFIG_SYSTEM_DATA_VERIFICATION=y @@ -297,6 +307,9 @@ CONFIG_ARCH_MULTI_V6_V7=y # CONFIG_ARCH_VIRT is not set # CONFIG_ARCH_AIROHA is not set +# CONFIG_ARCH_RDA is not set +# CONFIG_ARCH_SUNPLUS is not set +# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_ACTIONS is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_ARTPEC is not set @@ -340,7 +353,6 @@ CONFIG_MACH_DOVE=y # end of TI OMAP/AM/DM/DRA Family # CONFIG_ARCH_QCOM is not set -# CONFIG_ARCH_RDA is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_ROCKCHIP is not set # CONFIG_ARCH_S5PV210 is not set @@ -349,10 +361,8 @@ CONFIG_MACH_DOVE=y # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set # CONFIG_ARCH_STM32 is not set -# CONFIG_ARCH_SUNPLUS is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_TEGRA is not set -# CONFIG_ARCH_UNIPHIER is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VEXPRESS is not set @@ -581,6 +591,7 @@ CONFIG_KERNEL_MODE_NEON=y # CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y +# CONFIG_SUSPEND_SKIP_SYNC is not set # CONFIG_HIBERNATION is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -707,6 +718,7 @@ CONFIG_MODULE_COMPRESS_NONE=y # CONFIG_MODULE_COMPRESS_ZSTD is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" +# CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLOCK_LEGACY_AUTOLOAD=y @@ -717,6 +729,7 @@ CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y # CONFIG_BLK_DEV_THROTTLING_LOW is not set @@ -792,6 +805,7 @@ CONFIG_SWAP=y CONFIG_ZSWAP=y CONFIG_ZSWAP_DEFAULT_ON=y # CONFIG_ZSWAP_EXCLUSIVE_LOADS_DEFAULT_ON is not set +# CONFIG_ZSWAP_SHRINKER_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set @@ -810,17 +824,17 @@ CONFIG_ZSMALLOC=m CONFIG_ZSMALLOC_CHAIN_SIZE=8 # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y +# CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y CONFIG_SLAB_FREELIST_RANDOM=y CONFIG_SLAB_FREELIST_HARDENED=y # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -844,6 +858,7 @@ CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_CMA=y +# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 @@ -861,6 +876,8 @@ CONFIG_MEMFD_CREATE=y # CONFIG_ANON_VMA_NAME is not set # CONFIG_USERFAULTFD is not set # CONFIG_LRU_GEN is not set +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y # @@ -1356,7 +1373,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m -# CONFIG_BPFILTER is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m @@ -1369,6 +1385,12 @@ CONFIG_IP_DCCP_CCID3=y CONFIG_IP_DCCP_TFRC_LIB=y # end of DCCP CCIDs Configuration +# +# DCCP Kernel Hacking +# +# CONFIG_IP_DCCP_DEBUG is not set +# end of DCCP Kernel Hacking + CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y @@ -1652,6 +1674,7 @@ CONFIG_BT_LEDS=y # CONFIG_BT_MSFTEXT is not set # CONFIG_BT_AOSPEXT is not set # CONFIG_BT_DEBUGFS is not set +# CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers @@ -1716,6 +1739,7 @@ CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +# CONFIG_CFG80211_CERTIFICATION_ONUS is not set CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y # CONFIG_CFG80211_DEFAULT_PS is not set @@ -1825,6 +1849,7 @@ CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIE_PTM is not set CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set CONFIG_PCI_DOE=y CONFIG_PCI_BRIDGE_EMUL=y @@ -1832,6 +1857,11 @@ CONFIG_PCI_BRIDGE_EMUL=y # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set # CONFIG_PCI_DYNAMIC_OF_NODES is not set +# CONFIG_PCIE_BUS_TUNE_OFF is not set +CONFIG_PCIE_BUS_DEFAULT=y +# CONFIG_PCIE_BUS_SAFE is not set +# CONFIG_PCIE_BUS_PERFORMANCE is not set +# CONFIG_PCIE_BUS_PEER2PEER is not set CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_HOTPLUG_PCI is not set @@ -1851,7 +1881,6 @@ CONFIG_PCI_MVEBU=y # Cadence-based PCIe controllers # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set -# CONFIG_PCI_J721E_HOST is not set # end of Cadence-based PCIe controllers # @@ -1936,6 +1965,9 @@ CONFIG_FW_UPLOAD=y CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y @@ -1986,11 +2018,10 @@ CONFIG_ARM_SCMI_HAVE_SHMEM=y CONFIG_ARM_SCMI_HAVE_MSG=y CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y # CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set -CONFIG_ARM_SCMI_POWER_DOMAIN=m -CONFIG_ARM_SCMI_PERF_DOMAIN=m CONFIG_ARM_SCMI_POWER_CONTROL=m # end of ARM System Control and Management Interface Protocol +# CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_TRUSTED_FOUNDATIONS is not set # CONFIG_GOOGLE_FIRMWARE is not set @@ -2184,6 +2215,7 @@ CONFIG_ZRAM_DEF_COMP_LZORLE=y # CONFIG_ZRAM_DEF_COMP_842 is not set CONFIG_ZRAM_DEF_COMP="lzo-rle" CONFIG_ZRAM_WRITEBACK=y +# CONFIG_ZRAM_TRACK_ENTRY_ACTIME is not set # CONFIG_ZRAM_MEMORY_TRACKING is not set # CONFIG_ZRAM_MULTI_COMP is not set CONFIG_BLK_DEV_LOOP=y @@ -2245,6 +2277,7 @@ CONFIG_MISC_RTSX=m CONFIG_HISI_HIKEY_USB=m CONFIG_OPEN_DICE=m CONFIG_VCPU_STALL_DETECTOR=m +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -2472,13 +2505,10 @@ CONFIG_PATA_OF_PLATFORM=m CONFIG_MD=y CONFIG_BLK_DEV_MD=m CONFIG_MD_BITMAP_FILE=y -CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m CONFIG_MD_CLUSTER=m CONFIG_BCACHE=m # CONFIG_BCACHE_DEBUG is not set @@ -2624,9 +2654,8 @@ CONFIG_NET_DSA_REALTEK_RTL8365MB=m CONFIG_NET_DSA_REALTEK_RTL8366RB=m # CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set # CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set -CONFIG_NET_DSA_VITESSE_VSC73XX=m -CONFIG_NET_DSA_VITESSE_VSC73XX_SPI=m -CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM=m +# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set +# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y @@ -2723,6 +2752,7 @@ CONFIG_8139TOO_TUNE_TWISTER=y # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=m +CONFIG_R8169_LEDS=y # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_SAMSUNG is not set @@ -2748,7 +2778,6 @@ CONFIG_TXGBE=m # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y CONFIG_XILINX_EMACLITE=m -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -2811,6 +2840,7 @@ CONFIG_DP83848_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set CONFIG_DP83TD510_PHY=m +# CONFIG_DP83TG720_PHY is not set CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -3063,8 +3093,6 @@ CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_PCIE=y # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -# CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IPW2100=m CONFIG_IPW2100_MONITOR=y @@ -3229,9 +3257,7 @@ CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL12XX is not set # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set -CONFIG_RTL8723DU=m CONFIG_RTL8723DS=m -# CONFIG_RTL8822CS is not set CONFIG_RTL8822BU=m CONFIG_RTL8821CU=m CONFIG_88XXAU=m @@ -3239,13 +3265,11 @@ CONFIG_RTL8192EU=m CONFIG_RTL8189FS=m CONFIG_RTL8189ES=m CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y CONFIG_QTNFMAC=m CONFIG_QTNFMAC_PCIE=m -CONFIG_USB_NET_RNDIS_WLAN=m # CONFIG_MAC80211_HWSIM is not set CONFIG_VIRT_WIFI=m # CONFIG_WAN is not set @@ -3394,6 +3418,7 @@ CONFIG_JOYSTICK_WALKERA0701=m CONFIG_JOYSTICK_QWIIC=m # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -3502,6 +3527,7 @@ CONFIG_HVC_DRIVER=y # CONFIG_HVC_DCC is not set CONFIG_SERIAL_DEV_BUS=y CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +# CONFIG_TTY_PRINTK is not set CONFIG_PRINTER=m # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=m @@ -3625,6 +3651,7 @@ CONFIG_DW_I3C_MASTER=m CONFIG_SVC_I3C_MASTER=m CONFIG_MIPI_I3C_HCI=m CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y @@ -3709,6 +3736,7 @@ CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_CY8C95X0=m # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -3733,6 +3761,8 @@ CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y CONFIG_GPIO_CDEV=y CONFIG_GPIO_CDEV_V1=y CONFIG_GPIO_GENERIC=y @@ -3825,6 +3855,7 @@ CONFIG_W1=m # # 1-wire Bus Masters # +# CONFIG_W1_MASTER_AMD_AXI is not set # CONFIG_W1_MASTER_MATROX is not set CONFIG_W1_MASTER_DS2490=m CONFIG_W1_MASTER_DS2482=m @@ -3965,6 +3996,7 @@ CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_F71882FG=m CONFIG_SENSORS_F75375S=m CONFIG_SENSORS_FTSTEUTATES=m +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_G760A=m @@ -4065,6 +4097,7 @@ CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LT7182S=m # CONFIG_SENSORS_LTC2978 is not set CONFIG_SENSORS_LTC3815=m +# CONFIG_SENSORS_LTC4286 is not set CONFIG_SENSORS_MAX15301=m CONFIG_SENSORS_MAX16064=m # CONFIG_SENSORS_MAX16601 is not set @@ -4073,10 +4106,12 @@ CONFIG_SENSORS_MAX20751=m CONFIG_SENSORS_MAX31785=m CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX8688=m +# CONFIG_SENSORS_MP2856 is not set CONFIG_SENSORS_MP2888=m CONFIG_SENSORS_MP2975=m # CONFIG_SENSORS_MP2975_REGULATOR is not set CONFIG_SENSORS_MP5023=m +# CONFIG_SENSORS_MP5990 is not set # CONFIG_SENSORS_MPQ7932 is not set CONFIG_SENSORS_PIM4328=m CONFIG_SENSORS_PLI1209BC=m @@ -4149,6 +4184,7 @@ CONFIG_SENSORS_W83773G=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y @@ -4373,6 +4409,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set CONFIG_REGULATOR_88PG86X=m CONFIG_REGULATOR_ACT8865=m # CONFIG_REGULATOR_AD5398 is not set @@ -4674,15 +4711,16 @@ CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_VMALLOC=m # end of Media drivers -CONFIG_MEDIA_HIDE_ANCILLARY_SUBDRV=y - # # Media ancillary drivers # CONFIG_MEDIA_ATTACH=y CONFIG_VIDEO_CAMERA_SENSOR=y CONFIG_VIDEO_CCS_PLL=m +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set CONFIG_VIDEO_HI846=m CONFIG_VIDEO_HI847=m @@ -4728,6 +4766,7 @@ CONFIG_VIDEO_OV5648=m # CONFIG_VIDEO_OV5675 is not set CONFIG_VIDEO_OV5693=m # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set CONFIG_VIDEO_OV7640=m @@ -4750,6 +4789,12 @@ CONFIG_VIDEO_RDACM21=m CONFIG_VIDEO_CCS=m # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -4770,23 +4815,108 @@ CONFIG_VIDEO_CCS=m # end of Flash devices # -# audio, video and radio I2C drivers auto-selected by 'Autoselect ancillary drivers' +# Audio decoders, processors and mixers # +# CONFIG_VIDEO_CS3308 is not set +# CONFIG_VIDEO_CS5345 is not set CONFIG_VIDEO_CS53L32A=m CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_SONY_BTF_MPX=m +# CONFIG_VIDEO_TDA7432 is not set +# CONFIG_VIDEO_TDA9840 is not set +# CONFIG_VIDEO_TEA6415C is not set +# CONFIG_VIDEO_TEA6420 is not set +# CONFIG_VIDEO_TLV320AIC23B is not set +# CONFIG_VIDEO_TVAUDIO is not set CONFIG_VIDEO_UDA1342=m +# CONFIG_VIDEO_VP27SMPX is not set +# CONFIG_VIDEO_WM8739 is not set CONFIG_VIDEO_WM8775=m +# end of Audio decoders, processors and mixers + +# +# RDS decoders +# +# CONFIG_VIDEO_SAA6588 is not set +# end of RDS decoders + +# +# Video decoders +# +# CONFIG_VIDEO_ADV7180 is not set +# CONFIG_VIDEO_ADV7183 is not set +# CONFIG_VIDEO_ADV748X is not set +# CONFIG_VIDEO_ADV7604 is not set +# CONFIG_VIDEO_ADV7842 is not set +# CONFIG_VIDEO_BT819 is not set +# CONFIG_VIDEO_BT856 is not set +# CONFIG_VIDEO_BT866 is not set +# CONFIG_VIDEO_ISL7998X is not set +# CONFIG_VIDEO_KS0127 is not set +# CONFIG_VIDEO_MAX9286 is not set +# CONFIG_VIDEO_ML86V7667 is not set +# CONFIG_VIDEO_SAA7110 is not set CONFIG_VIDEO_SAA711X=m +# CONFIG_VIDEO_TC358743 is not set +# CONFIG_VIDEO_TC358746 is not set +# CONFIG_VIDEO_TVP514X is not set CONFIG_VIDEO_TVP5150=m +# CONFIG_VIDEO_TVP7002 is not set CONFIG_VIDEO_TW2804=m +# CONFIG_VIDEO_TW9900 is not set CONFIG_VIDEO_TW9903=m CONFIG_VIDEO_TW9906=m +# CONFIG_VIDEO_TW9910 is not set +# CONFIG_VIDEO_VPX3220 is not set # # Video and audio decoders # +# CONFIG_VIDEO_SAA717X is not set CONFIG_VIDEO_CX25840=m +# end of Video decoders + +# +# Video encoders +# +# CONFIG_VIDEO_ADV7170 is not set +# CONFIG_VIDEO_ADV7175 is not set +# CONFIG_VIDEO_ADV7343 is not set +# CONFIG_VIDEO_ADV7393 is not set +# CONFIG_VIDEO_ADV7511 is not set +# CONFIG_VIDEO_AK881X is not set +# CONFIG_VIDEO_SAA7127 is not set +# CONFIG_VIDEO_SAA7185 is not set +# CONFIG_VIDEO_THS8200 is not set +# end of Video encoders + +# +# Video improvement chips +# +# CONFIG_VIDEO_UPD64031A is not set +# CONFIG_VIDEO_UPD64083 is not set +# end of Video improvement chips + +# +# Audio/Video compression chips +# +# CONFIG_VIDEO_SAA6752HS is not set +# end of Audio/Video compression chips + +# +# SDR tuner chips +# +# CONFIG_SDR_MAX2175 is not set +# end of SDR tuner chips + +# +# Miscellaneous helper chips +# +# CONFIG_VIDEO_I2C is not set +# CONFIG_VIDEO_M52790 is not set +# CONFIG_VIDEO_ST_MIPID02 is not set +# CONFIG_VIDEO_THS7303 is not set +# end of Miscellaneous helper chips # # Video serializers and deserializers @@ -4796,10 +4926,6 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB960 is not set # end of Video serializers and deserializers -# -# SPI I2C drivers auto-selected by 'Autoselect ancillary drivers' -# - # # Media SPI Adapters # @@ -4810,7 +4936,7 @@ CONFIG_VIDEO_GS1662=m CONFIG_MEDIA_TUNER=m # -# Tuner drivers auto-selected by 'Autoselect ancillary drivers' +# Customize TV tuners # CONFIG_MEDIA_TUNER_E4000=m CONFIG_MEDIA_TUNER_FC0011=m @@ -4818,13 +4944,19 @@ CONFIG_MEDIA_TUNER_FC0012=m CONFIG_MEDIA_TUNER_FC0013=m CONFIG_MEDIA_TUNER_FC2580=m CONFIG_MEDIA_TUNER_IT913X=m +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set CONFIG_MEDIA_TUNER_MC44S803=m CONFIG_MEDIA_TUNER_MSI001=m CONFIG_MEDIA_TUNER_MT2060=m CONFIG_MEDIA_TUNER_MT2063=m CONFIG_MEDIA_TUNER_MT20XX=m +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set CONFIG_MEDIA_TUNER_MXL5005S=m CONFIG_MEDIA_TUNER_MXL5007T=m +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set CONFIG_MEDIA_TUNER_QM1D1C0042=m CONFIG_MEDIA_TUNER_QT1010=m CONFIG_MEDIA_TUNER_R820T=m @@ -4832,6 +4964,7 @@ CONFIG_MEDIA_TUNER_SI2157=m CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA18212=m CONFIG_MEDIA_TUNER_TDA18218=m +# CONFIG_MEDIA_TUNER_TDA18250 is not set CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA827X=m CONFIG_MEDIA_TUNER_TDA8290=m @@ -4842,15 +4975,23 @@ CONFIG_MEDIA_TUNER_TUA9001=m CONFIG_MEDIA_TUNER_XC2028=m CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_XC5000=m +# end of Customize TV tuners # -# DVB Frontend drivers auto-selected by 'Autoselect ancillary drivers' +# Customise DVB Frontends # # # Multistandard (satellite) frontends # CONFIG_DVB_M88DS3103=m +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set # # Multistandard (cable + terrestrial) frontends @@ -4864,33 +5005,72 @@ CONFIG_DVB_TDA18271C2DD=m # # DVB-S (satellite) frontends # +# CONFIG_DVB_CX24110 is not set CONFIG_DVB_CX24116=m +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STV0299 is not set CONFIG_DVB_STV0900=m CONFIG_DVB_STV6110=m CONFIG_DVB_TDA10071=m +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_TDA826X is not set CONFIG_DVB_TS2020=m +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set # # DVB-T (terrestrial) frontends # CONFIG_DVB_AF9013=m +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_DIB9000 is not set CONFIG_DVB_DRXD=m CONFIG_DVB_EC100=m +# CONFIG_DVB_L64781 is not set CONFIG_DVB_MT352=m +# CONFIG_DVB_NXT6000 is not set CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m CONFIG_DVB_RTL2832_SDR=m +# CONFIG_DVB_S5H1432 is not set CONFIG_DVB_SI2168=m +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_STV0367 is not set CONFIG_DVB_TDA10048=m +# CONFIG_DVB_TDA1004X is not set CONFIG_DVB_ZD1301_DEMOD=m CONFIG_DVB_ZL10353=m +# CONFIG_DVB_CXD2880 is not set # # DVB-C (cable) frontends # +# CONFIG_DVB_STV0297 is not set +# CONFIG_DVB_TDA10021 is not set CONFIG_DVB_TDA10023=m +# CONFIG_DVB_VES1820 is not set # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends @@ -4898,42 +5078,67 @@ CONFIG_DVB_TDA10023=m CONFIG_DVB_AU8522=m CONFIG_DVB_AU8522_DTV=m CONFIG_DVB_AU8522_V4L=m +# CONFIG_DVB_BCM3510 is not set CONFIG_DVB_LG2160=m CONFIG_DVB_LGDT3305=m CONFIG_DVB_LGDT3306A=m CONFIG_DVB_LGDT330X=m CONFIG_DVB_MXL692=m +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_OR51211 is not set CONFIG_DVB_S5H1409=m CONFIG_DVB_S5H1411=m # # ISDB-T (terrestrial) frontends # +# CONFIG_DVB_DIB8000 is not set CONFIG_DVB_MB86A20S=m CONFIG_DVB_S921=m # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # +# CONFIG_DVB_MN88443X is not set CONFIG_DVB_TC90522=m # # Digital terrestrial only tuners/PLL # CONFIG_DVB_PLL=m +# CONFIG_DVB_TUNER_DIB0070 is not set +# CONFIG_DVB_TUNER_DIB0090 is not set # # SEC control devices for DVB-S # CONFIG_DVB_A8293=m CONFIG_DVB_AF9033=m +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_HELENE is not set +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set CONFIG_DVB_ISL6423=m +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_M88RS2000 is not set +# CONFIG_DVB_TDA665x is not set CONFIG_DVB_DRX39XYJ=m # # Common Interface (EN50221) controller drivers # +# CONFIG_DVB_CXD2099 is not set CONFIG_DVB_SP2=m +# end of Customise DVB Frontends # end of Media ancillary drivers # @@ -4955,6 +5160,7 @@ CONFIG_PANEL_PROFILE=5 CONFIG_CHARLCD_BL_FLASH=y CONFIG_PANEL=m # CONFIG_DRM is not set +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set # # Frame buffer Devices @@ -4990,6 +5196,7 @@ CONFIG_BACKLIGHT_ADP8870=m CONFIG_BACKLIGHT_LM3630A=m CONFIG_BACKLIGHT_LM3639=m CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_MP3309C is not set CONFIG_BACKLIGHT_GPIO=m CONFIG_BACKLIGHT_LV5207LP=m CONFIG_BACKLIGHT_BD6107=m @@ -5183,6 +5390,7 @@ CONFIG_HID_U2FZERO=m # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2200 is not set # CONFIG_HID_MCP2221 is not set # end of Special HID drivers @@ -5224,6 +5432,7 @@ CONFIG_USB_DEFAULT_PERSIST=y CONFIG_USB_DYNAMIC_MINORS=y # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_PRODUCTLIST is not set +# CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 # CONFIG_USB_MON is not set @@ -5596,6 +5805,7 @@ CONFIG_RTC_DRV_ABEOZ9=m # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=m CONFIG_RTC_DRV_NCT3018Y=m # CONFIG_RTC_DRV_RS5C372 is not set @@ -5736,6 +5946,7 @@ CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=m # CONFIG_VFIO_NOIOMMU is not set CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for PCI devices @@ -5993,6 +6204,9 @@ CONFIG_QCOM_QMI_HELPERS=m # # end of Amlogic PM Domains +CONFIG_ARM_SCMI_PERF_DOMAIN=m +CONFIG_ARM_SCMI_POWER_DOMAIN=m + # # Broadcom PM Domains # @@ -6109,6 +6323,7 @@ CONFIG_STK8BA50=m CONFIG_AD_SIGMA_DELTA=m # CONFIG_AD4130 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set CONFIG_AD7124=m # CONFIG_AD7192 is not set CONFIG_AD7266=m @@ -6147,6 +6362,7 @@ CONFIG_MAX1118=m # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set @@ -6209,6 +6425,7 @@ CONFIG_AD74413R=m # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set CONFIG_BME680=m @@ -6289,6 +6506,7 @@ CONFIG_LTC1660=m # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set CONFIG_TI_DAC5571=m @@ -6366,6 +6584,7 @@ CONFIG_AM2315=m CONFIG_DHT11=m CONFIG_HDC100X=m CONFIG_HDC2010=m +# CONFIG_HDC3020 is not set CONFIG_HTS221=m CONFIG_HTS221_I2C=m CONFIG_HTS221_SPI=m @@ -6383,6 +6602,8 @@ CONFIG_SI7020=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -6423,10 +6644,12 @@ CONFIG_GP2AP020A00F=m CONFIG_SENSORS_ISL29018=m CONFIG_SENSORS_ISL29028=m CONFIG_ISL29125=m +# CONFIG_ISL76682 is not set CONFIG_JSA1212=m # CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set CONFIG_RPR0521=m +# CONFIG_LTR390 is not set CONFIG_LTR501=m # CONFIG_LTRF216A is not set CONFIG_LV0104CS=m @@ -6454,6 +6677,7 @@ CONFIG_VCNL4000=m CONFIG_VCNL4035=m # CONFIG_VEML6030 is not set CONFIG_VEML6070=m +# CONFIG_VEML6075 is not set CONFIG_VL6180=m CONFIG_ZOPT2201=m # end of Light sensors @@ -6539,6 +6763,7 @@ CONFIG_BMP280_SPI=m # CONFIG_DLHL60D is not set CONFIG_DPS310=m # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -6592,6 +6817,7 @@ CONFIG_VL53L0X_I2C=m CONFIG_MAXIM_THERMOCOUPLE=m CONFIG_MLX90614=m CONFIG_MLX90632=m +# CONFIG_MLX90635 is not set CONFIG_TMP006=m CONFIG_TMP007=m CONFIG_TMP117=m @@ -6600,11 +6826,13 @@ CONFIG_TMP117=m # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set CONFIG_MAX31865=m +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y +# CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_TCB=m CONFIG_PWM_CLK=m CONFIG_PWM_DWC_CORE=m @@ -6672,6 +6900,7 @@ CONFIG_ARM_CCI_PMU=m # CONFIG_ARM_CCN is not set CONFIG_ARM_PMU=y # CONFIG_ARM_PMUV3 is not set +# CONFIG_DWC_PCIE_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -6686,6 +6915,7 @@ CONFIG_RAS=y CONFIG_DAX=m CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types @@ -6752,6 +6982,7 @@ CONFIG_DPLL=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y CONFIG_EXT2_FS=y @@ -6856,7 +7087,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_STATS=y -CONFIG_FSCACHE=m +CONFIG_FSCACHE=y CONFIG_FSCACHE_STATS=y # CONFIG_FSCACHE_DEBUG is not set CONFIG_CACHEFILES=m @@ -6990,6 +7221,7 @@ CONFIG_EROFS_FS_XATTR=y CONFIG_EROFS_FS_POSIX_ACL=y CONFIG_EROFS_FS_SECURITY=y # CONFIG_EROFS_FS_ZIP is not set +# CONFIG_EROFS_FS_ONDEMAND is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V2=m @@ -7021,6 +7253,7 @@ CONFIG_NFSD_SCSILAYOUT=y CONFIG_NFSD_FLEXFILELAYOUT=y # CONFIG_NFSD_V4_2_INTER_SSC is not set CONFIG_NFSD_V4_SECURITY_LABEL=y +# CONFIG_NFSD_LEGACY_CLIENT_TRACKING is not set CONFIG_GRACE_PERIOD=m CONFIG_LOCKD=m CONFIG_LOCKD_V4=y @@ -7302,14 +7535,12 @@ CONFIG_CRYPTO_ADIANTUM=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_CHACHA20=m CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=m CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HCTR2=m CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_OFB=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XCTR=m CONFIG_CRYPTO_XTS=y @@ -7442,6 +7673,7 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=m # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -7605,6 +7837,7 @@ CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y +# CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y @@ -7615,17 +7848,20 @@ CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y +CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y # CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y CONFIG_POLYNOMIAL=m +CONFIG_FIRMWARE_TABLE=y # # Kernel hacking @@ -7640,23 +7876,32 @@ CONFIG_PRINTK_TIME=y CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set CONFIG_DYNAMIC_DEBUG=y CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options -# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y +CONFIG_DEBUG_INFO_NONE=y +# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_DEBUG_INFO_DWARF5 is not set CONFIG_FRAME_WARN=1024 # CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y +# CONFIG_VMLINUX_MAP is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options # @@ -7671,6 +7916,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y @@ -7679,21 +7925,36 @@ CONFIG_HAVE_KCSAN_COMPILER=y # # Networking Debugging # +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set # end of Networking Debugging # # Memory Debugging # CONFIG_PAGE_EXTENSION=y +# CONFIG_DEBUG_PAGEALLOC is not set CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set # CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_DEBUG_KMAP_LOCAL is not set +# CONFIG_DEBUG_HIGHMEM is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -7703,20 +7964,29 @@ CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set # end of Memory Debugging +# CONFIG_DEBUG_SHIRQ is not set + # # Debug Oops, Lockups and Hangs # # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 +# CONFIG_SOFTLOCKUP_DETECTOR is not set CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y +# CONFIG_HARDLOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # +CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y +# CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging # CONFIG_DEBUG_TIMEKEEPING is not set @@ -7725,27 +7995,55 @@ CONFIG_SCHED_INFO=y # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set +# CONFIG_SCF_TORTURE_TEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set # # Debug kernel data structures # +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_PLIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_CLOSURES is not set +# CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures # # RCU Debugging # +# CONFIG_RCU_SCALE_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_RCU_CPU_STALL_CPUTIME is not set +# CONFIG_RCU_CPU_STALL_NOTIFIER is not set +CONFIG_RCU_TRACE=y +# CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_DEBUG_CGROUP_REF is not set CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y @@ -7754,6 +8052,7 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y +CONFIG_TRACE_CLOCK=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set @@ -7762,9 +8061,12 @@ CONFIG_TRACING_SUPPORT=y # # arm Debugging # +# CONFIG_ARM_PTDUMP_DEBUGFS is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y +# CONFIG_BACKTRACE_VERBOSE is not set # CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_LL is not set CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_ARM_KPROBES_TEST=m @@ -7776,7 +8078,9 @@ CONFIG_ARM_KPROBES_TEST=m # Kernel Testing and Coverage # # CONFIG_KUNIT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_FUNCTION_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set @@ -7785,7 +8089,12 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set CONFIG_TEST_DIV64=m +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_TEST_REF_TRACKER is not set +# CONFIG_RBTREE_TEST is not set CONFIG_REED_SOLOMON_TEST=m +# CONFIG_INTERVAL_TREE_TEST is not set +# CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set CONFIG_TEST_HEXDUMP=m @@ -7816,6 +8125,7 @@ CONFIG_TEST_BLACKHOLE_DEV=m CONFIG_TEST_MEMCAT_P=m # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage @@ -7825,5 +8135,3 @@ CONFIG_ARCH_USE_MEMTEST=y # # end of Rust hacking # end of Kernel hacking -# CONFIG_DEBUG_INFO is not set -# CONFIG_GDB_SCRIPTS is not set diff --git a/config/sources/families/mvebu.conf b/config/sources/families/mvebu.conf index f165e7809a4f..4c0bebdeac90 100644 --- a/config/sources/families/mvebu.conf +++ b/config/sources/families/mvebu.conf @@ -29,7 +29,7 @@ case $BRANCH in edge) - declare -g KERNEL_MAJOR_MINOR="6.7" # Major and minor versions of this kernel. + declare -g KERNEL_MAJOR_MINOR="6.8" # Major and minor versions of this kernel. declare -g KERNEL_SKIP_MAKEFILE_VERSION="yes" # Armbian patches change the version here, so no use having it in the version string. declare -g KERNELSOURCE="git://git.armlinux.org.uk/~rmk/linux-arm.git" diff --git a/patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled b/patch/kernel/archive/mvebu-6.8/09-pci-link-retraining.patch.disabled similarity index 100% rename from patch/kernel/archive/mvebu-6.7/09-pci-link-retraining.patch.disabled rename to patch/kernel/archive/mvebu-6.8/09-pci-link-retraining.patch.disabled diff --git a/patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch b/patch/kernel/archive/mvebu-6.8/10-fix-dsa-debugfs.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/10-fix-dsa-debugfs.patch rename to patch/kernel/archive/mvebu-6.8/10-fix-dsa-debugfs.patch diff --git a/patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch b/patch/kernel/archive/mvebu-6.8/91-01-libata-add-ledtrig-support.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/91-01-libata-add-ledtrig-support.patch rename to patch/kernel/archive/mvebu-6.8/91-01-libata-add-ledtrig-support.patch diff --git a/patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch b/patch/kernel/archive/mvebu-6.8/91-02-Enable-ATA-port-LED-trigger.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/91-02-Enable-ATA-port-LED-trigger.patch rename to patch/kernel/archive/mvebu-6.8/91-02-Enable-ATA-port-LED-trigger.patch diff --git a/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch b/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-add_wake_on_gpio_support.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-add_wake_on_gpio_support.patch rename to patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-add_wake_on_gpio_support.patch diff --git a/patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch b/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch rename to patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch diff --git a/patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch b/patch/kernel/archive/mvebu-6.8/94-helios4-dts-add-wake-on-lan-support.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/94-helios4-dts-add-wake-on-lan-support.patch rename to patch/kernel/archive/mvebu-6.8/94-helios4-dts-add-wake-on-lan-support.patch diff --git a/patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch b/patch/kernel/archive/mvebu-6.8/compile-dtb-with-symbol-support.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/compile-dtb-with-symbol-support.patch rename to patch/kernel/archive/mvebu-6.8/compile-dtb-with-symbol-support.patch diff --git a/patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch b/patch/kernel/archive/mvebu-6.8/dts-disable-spi-flash-on-a388-microsom.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/dts-disable-spi-flash-on-a388-microsom.patch rename to patch/kernel/archive/mvebu-6.8/dts-disable-spi-flash-on-a388-microsom.patch diff --git a/patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch b/patch/kernel/archive/mvebu-6.8/general-increasing_DMA_block_memory_allocation_to_2048.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/general-increasing_DMA_block_memory_allocation_to_2048.patch rename to patch/kernel/archive/mvebu-6.8/general-increasing_DMA_block_memory_allocation_to_2048.patch diff --git a/patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch b/patch/kernel/archive/mvebu-6.8/unlock_atheros_regulatory_restrictions.patch similarity index 100% rename from patch/kernel/archive/mvebu-6.7/unlock_atheros_regulatory_restrictions.patch rename to patch/kernel/archive/mvebu-6.8/unlock_atheros_regulatory_restrictions.patch