From 41b46bfe20620fcfc8dc13c952e80a1167a1c8cf Mon Sep 17 00:00:00 2001 From: Miren Radia Date: Thu, 29 Jun 2023 15:52:22 +0100 Subject: [PATCH 1/2] Docs: Add table of SYCL GNU Make vars --- Docs/sphinx_documentation/source/GPU.rst | 37 ++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/Docs/sphinx_documentation/source/GPU.rst b/Docs/sphinx_documentation/source/GPU.rst index f71a7163f03..b844f122e41 100644 --- a/Docs/sphinx_documentation/source/GPU.rst +++ b/Docs/sphinx_documentation/source/GPU.rst @@ -187,6 +187,43 @@ can run it and that will generate results like: [The Pinned Arena] space (MB): 8 AMReX (19.06-404-g0455b168b69c-dirty) finalized +SYCL configuration variables +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +When building with ``USE_SYCL=TRUE``, one can set the following makefile +variables to configure the build + +.. raw:: latex + + \begin{center} + +.. _tab:gnumakesyclvar: + +.. table:: AMReX SYCL-specific GNU Make build options + + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | Variable Name | Description | Default | Possible values | + +==============================+=================================================+=============+=================+ + | SYCL_AOT | Enable SYCL ahead-of-time compilation | FALSE | TRUE, FALSE | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | SYCL_AOT_GRF_MODE | Specify AOT register file mode | Default | Default, Large, | + | | | | AutoLarge | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | AMREX_INTEL_ARCH | Specify target if AOT is enabled | None | pvc, etc. | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | SYCL_SPLIT_KERNEL | Enable SYCL kernel splitting | FALSE | TRUE, FALSE | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | USE_ONEDPL | Enable SYCL's oneDPL algorithms | NO | YES, NO | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | SYCL_SUB_GROUP_SIZE | Specify subgroup size | 32 | 64, 32, 16 | + +------------------------------+-------------------------------------------------+-------------+-----------------+ + | SYCL_MAX_PARALLEL_LINK_JOBS | Number of parallel AOT device compilations | 1 | 1, 2, 3, etc. | + +------------------------------+-------------------------------------------------+-------------+-----------------+ +.. raw:: latex + + \end{center} + + Building with CMake ------------------- From 2b700f643d78e768aa6340750670454199ceaef4 Mon Sep 17 00:00:00 2001 From: Miren Radia Date: Tue, 22 Aug 2023 17:39:20 +0100 Subject: [PATCH 2/2] Docs: Modify SYCL GNU Make vars table --- Docs/sphinx_documentation/source/GPU.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Docs/sphinx_documentation/source/GPU.rst b/Docs/sphinx_documentation/source/GPU.rst index b844f122e41..1391015f31e 100644 --- a/Docs/sphinx_documentation/source/GPU.rst +++ b/Docs/sphinx_documentation/source/GPU.rst @@ -217,7 +217,7 @@ variables to configure the build +------------------------------+-------------------------------------------------+-------------+-----------------+ | SYCL_SUB_GROUP_SIZE | Specify subgroup size | 32 | 64, 32, 16 | +------------------------------+-------------------------------------------------+-------------+-----------------+ - | SYCL_MAX_PARALLEL_LINK_JOBS | Number of parallel AOT device compilations | 1 | 1, 2, 3, etc. | + | SYCL_MAX_PARALLEL_LINK_JOBS | Number of parallel jobs in device link | 1 | 1, 2, 3, etc. | +------------------------------+-------------------------------------------------+-------------+-----------------+ .. raw:: latex